V-Shaped RRAM Cell Structure for Lower Voltage Operation
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Solution Overview
Problem
Current resistive random access memory (RRAM) devices require higher voltages and slower read/write times due to their traditional plate stack structure, which hinders their performance and compatibility with advanced memory devices.
Innovation Solution
The RRAM cell structure is designed with V-shaped portions in the resistance variable layer and electrodes, enhancing the electric field and allowing for lower voltage operation and faster switching, achieved through a method involving the formation of dummy features, oxide layers, and electrodes with specific deposition and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional plate stack structure is used in RRAM devices, then manufacturing simplicity is maintained, but voltage requirement increases and read/write speed decreases
Solution Approach 1:
The patent applies asymmetry by transitioning from the traditional symmetric plate stack structure to an asymmetric V-shaped structure. The V-shaped resistance variable layer and electrode configuration create an asymmetric electric field distribution that concentrates the field at the apex, enabling faster switching speeds and lower voltage operation while maintaining manufacturing feasibility through conformal deposition processes.
Solution Approach 2:
The patent implements dimensionality change by evolving from a two-dimensional plate stack configuration to a three-dimensional V-shaped structure. This dimensional transformation allows the electric field to be concentrated in a specific spatial region (at the V-shaped apex), thereby improving read/write speed without proportionally increasing overall device complexity.
2Use of energy by moving object
If traditional plate stack structure is used in RRAM devices, then structural simplicity is maintained, but operating voltage increases
Solution Approach 1:
The asymmetric V-shaped structure concentrates the electric field at the apex region, creating a high-field zone that enables breakdown and switching at lower applied voltages. This asymmetric field distribution reduces the overall operating voltage requirement compared to the uniform field distribution in plate stack structures, thereby improving energy efficiency.
Solution Approach 2:
The patent applies local quality by creating a localized high electric field region at the V-shaped apex rather than distributing the field uniformly throughout the device. This localized field concentration allows switching to occur at lower voltages specifically at the critical switching region, reducing the overall operating voltage while maintaining structural integrity.
3Productivity
If V-shaped structure is implemented in RRAM cells, then voltage requirement decreases and read/write speed increases, but manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by first forming dummy features (such as mandrels or sacrificial structures) that define the V-shaped geometry before depositing the resistance variable layer and electrodes. These preliminary structures guide the conformal deposition process to automatically form the desired V-shaped profile, simplifying the overall manufacturing process despite the complex final geometry.
Solution Approach 2:
The patent uses intermediary dummy features or sacrificial structures as mediators during fabrication. These intermediary elements are formed first, then used to template the V-shaped structure formation through conformal deposition, and finally removed or transformed. This intermediary approach enables complex V-shaped geometry to be achieved through standard deposition processes rather than requiring complex lithography or etching steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables RRAM cells to operate with lower voltages and faster read/write times, improving performance and compatibility with CMOS fabrication processes, thus meeting the demands of advanced memory devices.
Implementation Method 1
depositing an oxide layer over the substrate while forming a V-shaped valley on the oxide layer
Implementation Method 2
each of which can change and maintain the value of its resistivity based on applied electrical conditions
Data Source
AI summary
A method of forming an RRAM cell structure is provided. The method includes forming dummy features over a substrate, and the dummy features have a gap therebetween. The method also includes depositing an oxide layer over the dummy features while forming a first V-shaped valley on the oxide layer. The method further includes partially planarizing the oxide layer while leaving the first V-shaped valley. In addition, the method includes forming a first electrode over the oxide layer while forming a second V-shaped valley on the first electrode. The method further includes forming a resistance variable layer over the first electrode in a conformal manner. The method still includes forming a second electrode over the resistance variable layer.