V-Shaped STI Sidewalls for Void-Free Gate Fill

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Solution Overview

Problem

Current technologies face challenges in forming void-free and seamless gate structures during semiconductor memory device fabrication, leading to decreased yield and performance due to voids or large seams caused by increased aspect ratios during gap fill-in processes.

Innovation Solution

The method involves forming a trench in a semiconductor substrate with gradually sloped sidewalls, implanting an species at specific tilt angles to create implantation regions, annealing, and then forming a tunnel oxide layer and conductive film to create a seamless gate structure, using species like nitrogen, Germanium, or Fluorine, and rotating the device for precise implantation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the aspect ratio of gate technologies is increased, then device density is improved, but voids or large seams occur during gap fill-in processes

Engineering Contradiction:
Improvedevice densityVSAvoidvoid-free gate structure
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by performing implantation of nitrogen, germanium, or fluorine species into the trench sidewalls before the gap fill-in process. This pre-treatment modifies the sidewall properties to prevent void formation during subsequent material deposition, thereby achieving void-free gate structures even at high aspect ratios

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes physical and chemical parameters of the trench sidewalls through implantation of specific species (nitrogen, germanium, fluorine) at controlled doses and energies. These parameter changes modify the sidewall surface properties, enabling seamless gap fill-in and preventing void formation during the conformal deposition process

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If complex current technologies are used to address void formation, then some void issues may be mitigated, but manufacturing efficiency decreases and the problem of forming void-free and seamless gate structures is not fully solved

Engineering Contradiction:
Improvevoid-free gate structureVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies local quality by selectively implanting species only into the trench sidewall regions where void formation is most likely to occur during gap fill-in. This localized treatment targets specific problem areas without requiring complex global process modifications, maintaining manufacturing efficiency while achieving void-free structures

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces implantation species (nitrogen, germanium, or fluorine) as intermediary substances that modify the trench sidewall properties. These intermediaries facilitate seamless gap fill-in by changing the surface characteristics of the sidewalls, enabling conformal deposition without voids while keeping the overall process simple and efficient

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in substantially void-free and seamless gate structures, improving yield and performance by allowing smoother filling of trenches and reducing etching rates, as demonstrated in NOR flash 55 nm technology nodes.

Implementation Method 1

an implantation species is implanted at a first tilt angle forming implantation regions in a first of the sidewalls of the adjacent shallow trench isolation (STI) structures

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

The shallow trench isolation (STI) structures, trench, and implantation regions may be annealed

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS8872260B2Semiconductor device formation
Publication Date: 2014.10.28 MACRONIX INTERNATIONAL CO LTD
  • US8872260B2 patent drawing
  • US8872260B2 patent drawing
  • US8872260B2 patent drawing

AI summary

An apparatus of and method for making a semiconductor structure having a shallow trench isolation (STI) trench with a substantially v-shaped profile, that is the distance between top portions is greater than the distance between bottom portions of shallow trench isolation (STI) structure sidewalls adjacent to the trench, provides for substantially seamless and substantially void-free gate structures. The semiconductor structures are formed by implanting an implantation species into the sidewalls, which allows for the top portions of the sidewalls to be etched away at a greater rate than that of the bottom portions, resulting in the substantially v-shaped profile. And the substantially v-shaped profile allows for subsequent device layers to more easily and smoothly fill in the v-shaped trenches, due to a wider opening toward the tops of the trenches.