V-Shaped Oxidized Porous STI for Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current CMOS semiconductor fabrication techniques face challenges in achieving effective inter-well and intra-well isolation due to the scaling of shallow trench isolation (STI) dimensions, leading to poorer isolation and potential electrical breakdown, while also requiring deeper and wider trenches to maintain circuit performance without increasing manufacturing costs.
Innovation Solution
The method involves forming STI trenches with oxidized porous regions that are wider and deeper than the trench openings, using a process that includes boron implantation, anodization, and oxidation to create a 'V'-shaped oxidized region within the trenches, which are then filled with a dielectric material, allowing for varying trench sizes beneath the substrate surface to enhance isolation without sacrificing circuit density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If STI dimensions are reduced to enable scaling, then device density is improved, but isolation performance deteriorates leading to higher leakage and electrical breakdown
Solution Approach 1:
The patent applies local quality by creating a V-shaped oxidized porous region with different width at different depths. The oxidized region is wider at the bottom than at the top, providing enhanced isolation at the critical deep interface where leakage occurs, while maintaining smaller overall trench dimensions for high density. This non-uniform local structure optimizes isolation performance specifically where needed most.
Solution Approach 2:
The patent changes the physical and chemical parameters of the STI structure by creating an oxidized porous silicon region through boron implantation, anodization, and oxidation processes. This transforms the trench dielectric from a simple filled structure to one with an oxidized porous region that has different electrical and physical properties, providing superior isolation performance at reduced dimensions.
2Reliability
If deeper and wider STI trenches are formed to maintain isolation performance, then leakage is reduced, but circuit density decreases
Solution Approach 1:
The V-shaped oxidized porous region concentrates the isolation enhancement at the critical deep interface area where leakage pathways exist, rather than requiring uniform widening throughout the entire trench. This localized quality improvement achieves better isolation without proportionally increasing overall trench area, preserving circuit density.
Solution Approach 2:
The patent addresses the isolation-dimension tradeoff by transitioning from a uniform 2D trench cross-section to a 3D V-shaped structure with varying width through the depth dimension. This dimensional change allows the trench to provide enhanced isolation at depth while maintaining a smaller surface footprint, thus improving isolation performance without sacrificing circuit density.
3Reliability
If different size inter-well and intra-well STI trenches are created, then isolation effectiveness is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies universality by using the same boron implantation, anodization, and oxidation process sequence for both inter-well and intra-well trenches. While the trenches have different dimensions, they both receive the same V-shaped oxidized porous region treatment, allowing a single manufacturing workflow to produce multiple trench types with optimized isolation performance.
Solution Approach 2:
The patent implements local quality by selectively applying different trench widths and depths for inter-well versus intra-well isolation based on specific isolation requirements, while using a universal process approach. This allows optimization of each trench type's dimensions for its specific function without requiring entirely different manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved trench isolation with reduced well leakage and component area usage, maintaining electrical connections while minimizing manufacturing costs and maintaining circuit performance.
Implementation Method 1
implanting boron into the substrate adjacent the lower portion of the STI trench to form an implant region
Implementation Method 2
the implant region is anodized to form a porous silicon region
Implementation Method 3
the porous silicon region is oxidized to form an oxidized porous region
Data Source
AI summary
A method is disclosed for forming an STI (shallow trench isolation) in a substrate during CMOS (complementary metal-oxide semiconductor) semiconductor fabrication which includes providing at least two wells including dopants. A pad layer may be formed on a top surface of the substrate and a partial STI trench is etched in the upper portion of the substrate followed by etching to form a full STI trench. Boron is implanted in a lower area of the full STI trench forming an implant area which is anodized to form a porous silicon region, which is then oxidized to form a oxidized region. A dielectric layer is formed over the silicon nitride layer filling the full STI trench to provide, after etching, at least two electrical component areas on the top surface of the substrate having the full STI trench therebetween.