Value Converter for Mixed-Signal Power Supply Synchronization
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Solution Overview
Problem
Dynamic verification systems face challenges in accurately modeling mixed-signal integrated circuits due to mismatches between power supply specifications in Unified Power Format (UPF) and Hardware Description Language (HDL) descriptions, leading to incorrect simulation results and failure to detect design errors.
Innovation Solution
A method that involves generating a value converter to synchronize power supply network and HDL descriptions by converting voltage values between UPF and HDL formats, detecting mismatches, and inserting assertion functions to notify users of discrepancies, thereby ensuring accurate power intent integration during simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If power supply specifications are defined separately in UPF and HDL formats, then power distribution information can be specified in detail, but mismatches occur between the two descriptions leading to incorrect simulation results
Solution Approach 1:
A value converter is introduced as an intermediary component between the UPF power supply network description and the HDL circuit description. This converter translates voltage values from one format to the other, ensuring consistent power supply specifications across both domains and eliminating mismatches that lead to simulation errors
Solution Approach 2:
The system dynamically changes the voltage parameters by converting them between UPF and HDL formats using the value converter. This parameter transformation ensures that the same power supply voltage is correctly represented in both specification formats, maintaining consistency without requiring separate manual definitions
2Reliability
If value converter is generated to synchronize power supply descriptions, then simulation accuracy is improved, but device complexity increases
Solution Approach 1:
The value converter is designed to automatically perform format conversions without requiring manual intervention. The system self-services by detecting mismatches and applying the appropriate conversions between UPF and HDL voltage specifications, reducing the need for complex manual synchronization processes
Solution Approach 2:
The value converter is generated in advance during the verification setup phase, before simulation begins. This preliminary action prepares the synchronization mechanism ahead of time, allowing the actual simulation to proceed with pre-configured conversion capabilities rather than requiring complex runtime adjustments
3Reliability
If assertion functions are inserted to detect mismatches, then design error detection is improved, but computational resources are consumed
Solution Approach 1:
Assertion functions provide feedback mechanisms that monitor power supply voltage consistency between UPF and HDL descriptions during simulation. When mismatches are detected, the assertions trigger notifications to designers, enabling continuous verification without requiring exhaustive computational analysis of the entire design
Data Source
AI summary
A method includes: receiving a representation of a mixed-signal integrated circuit design including an analog circuit portion and a digital circuit portion including a plurality of descriptions of a power supply, the descriptions including a power supply network description and a register transfer level (RTL) hardware description language (HDL) description; determining a mismatch between the power supply network description and the HDL description of the power supply; generating a value converter to convert a voltage value associated with the power supply between the power supply network description and the HDL description; and converting, by a processor, between the power supply network description and the HDL description during runtime using the value converter to synchronize the power supply network description and the HDL description of the power supply responsive to the mismatch.