Vapor Phase Etching for Trace Metal Analysis

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Solution Overview

Problem

Existing vapor-phase etching methods for semiconductor wafers result in robust silicon oxide layers that hinder the collection efficiency of metal impurities, leading to incomplete analysis of trace metals due to uncontrolled etching and undefined surface conditions.

Innovation Solution

A vapor phase etching method using a mixture of HF and O3 gas, where the etching gas is introduced into the etching chamber in a way that allows it to distribute before contacting the wafer, ensuring a homogeneous etching process, followed by nitrogen gas drying and hydrophobization, allowing for precise layer removal and analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If vapor-phase etching is performed with conventional etching gases, then silicon oxide layers are removed, but robust silicon oxide layers remain that hinder collection efficiency of metal impurities

Engineering Contradiction:
Improvecollection efficiency of metal impuritiesVSAvoidrobustness of silicon oxide layer
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the chemical composition parameters of the etching gas from conventional single-gas systems to a mixed gas system comprising HF and O3. This parameter change transforms the etching mechanism to produce non-robust silicon oxide layers that do not hinder metal impurity collection, while maintaining controlled etching rates for precise depth profiling.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite gas mixture of HF (hydrogen fluoride) and O3 (ozone) as the etching medium. This composite approach combines the etching capability of HF with the oxidizing power of O3 to create a synergistic effect that removes silicon layers while forming easily collectible metal impurities, resolving the contradiction between layer removal effectiveness and collection efficiency.

Inventive Principle:
Principle #40Composite materials

2Productivity

If etching gas is introduced directly onto the wafer, then etching proceeds quickly, but the surface conditions become undefined and etching becomes uncontrolled

Engineering Contradiction:
Improveetching speedVSAvoiduniformity of etching
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces a distribution chamber as an intermediary component between the gas source and the wafer surface. This intermediary allows the HF/O3 mixed gas to homogenize and distribute uniformly across the wafer surface, ensuring controlled and uniform etching while maintaining high productivity through optimized gas flow paths and residence time.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method achieves a highly sensitive and uniform etching of crystalline silicon layers, enabling reliable depth profiling and improved collection efficiency of metal impurities, resulting in more accurate analysis of trace metals on semiconductor wafers.

Implementation Method 1

a first step during which an etching gas (decomposition gas) is brought into contact with the surface of the silicon wafer, thereby etching (or decomposing) the silicon wafer

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Implementation Method 2

a second step of collecting the etched or decomposed substances of the surface layer

Methodology Applied
Scientific EffectEvaporation: Evaporation

Implementation Method 3

a subsequent hydrophobization with HF gas

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS10861704B2Method for the vapour phase etching of a semiconductor wafer for trace metal analysis
Publication Date: 2020.12.08 SILTRONIC AG
  • US10861704B2 patent drawing
  • US10861704B2 patent drawing
  • US10861704B2 patent drawing

AI summary

The surface layer of a semiconductor wafer lying on a rotatable plate within an etching chamber is etched by a process whereby homogeneous etching of the surface is obtained by introducing an etching gas into the etching chamber in such a way that the flow of the etching gas is not directed directly to the wafer but is allowed first to distribute within the etching chamber before coming into contact with the surface of the semiconductor wafer to be etched.