Varactor Bank Topology for Fine DCO Frequency Steps
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Solution Overview
Problem
Existing frequency synthesizers and digitally controlled oscillators require a large number of switchable capacitive elements to achieve the necessary frequency modulation range, leading to increased complexity and power consumption.
Innovation Solution
A capacitive arrangement using varactor banks with series and shunt configurations, allowing for small and programmable changes in equivalent capacitance through on/off switching of varactors, reducing the number of elements needed for frequency steps while maintaining high resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a large number of switchable capacitive elements are used to achieve the required frequency modulation range, then the frequency resolution is improved, but the device complexity and power consumption increase
Solution Approach 1:
The capacitive arrangement is divided into multiple banks (first bank, second bank, third bank) with different configurations. Each bank contributes differently to the total capacitance, allowing fine frequency steps to be achieved through coordinated switching of smaller subsets of capacitive elements rather than requiring all elements to be individually controlled.
Solution Approach 2:
The patent introduces series and shunt connections in addition to parallel connections, adding topological dimensions to the capacitive arrangement. This multi-dimensional configuration space enables achieving high frequency resolution with fewer elements by exploiting the non-linear relationships between series/parallel/shunt combinations.
2Measurement precision
If a large number of switchable capacitive elements are used to achieve the required frequency modulation range, then the frequency resolution is improved, but the power consumption increases
Solution Approach 1:
By segmenting the capacitive elements into multiple banks with different switching patterns, the patent enables selective activation of only the necessary subset of elements for each frequency step, reducing the total number of switching operations and associated power consumption while maintaining fine frequency resolution.
Solution Approach 2:
The patent changes the operational parameters of the capacitive elements by using different connection configurations (series, parallel, shunt) and switching patterns. This allows the same physical elements to provide different capacitance values and switching behaviors, achieving high resolution with reduced power consumption through parameter optimization rather than increasing element count.
3Measurement precision
If additional MOS switches are used to control each capacitive element, then the frequency control precision is improved, but the signal integrity deteriorates due to increased quantization noise
Solution Approach 1:
Instead of using many small capacitive elements with individual switches, the patent inverts the approach by using fewer, larger capacitive elements with coordinated switching. This reversal reduces the number of switching events and associated quantization noise while achieving the same frequency control precision through the multi-bank configuration.
Solution Approach 2:
The patent merges the control of multiple capacitive banks into a coordinated switching scheme where banks are activated in specific combinations. This merging approach reduces the total number of independent switching operations, thereby reducing quantization noise while maintaining precise frequency control through the combined capacitance of multiple banks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise frequency control with reduced power consumption and increased resolution, achieving frequency steps in the sub-kHz range without the need for additional MOS switches, enhancing signal integrity and reducing quantization noise.
Implementation Method 1
The capacitive arrangement has a first bank of parallel coupled varactors, a second bank of series connected varactors, and a third bank of shunt connected varactors. Each bank has a control input for modifying the equivalent capacitance of the capacitive arrangement by switching the respective varactors on or off.
Data Source
AI summary
An electronic device has a capacitive arrangement for controlling a frequency characteristic. The capacitive arrangement has varactor banks having a number of parallel coupled varactors and a control input for switching the respective varactors on or off. A main varactor bank has N varactors and a series varactor bank has A varactors, the main varactor bank being connected in series with the series varactor bank. A shunt varactor bank of B varactors may be coupled to a ground reference and connected between the main varactor bank and the series varactor bank. When a varactor is switched in the main varactor bank, it provides an equivalent capacitance step size (or frequency step) smaller than size of a capacitance step when switching a single varactor on or off. According to the number of varactors selected in the shunt varactor, B, this frequency step can be made programmable. By the arrangement of unitary varactors a very small step size is achieved for providing a high resolution of frequency of a digitally controlled oscillator.


