Variable-Bit ECC Coding for Aging Flash Memory Error Rates
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Solution Overview
Problem
Non-volatile data storage devices, such as flash memory devices, face increased bit error rates as they age, leading to higher decoding latency and power consumption when using a large number of parity bits for error correction, even though the additional error correction capability is not utilized until the end of the device's life.
Innovation Solution
A variable-bit ECC encoder dynamically adjusts the number of parity bits based on the statistical error rate of data read from the memory, using a threshold probability of error correction to maintain error correction capability as the device ages, thereby reducing decoding latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large number of parity bits are used in ECC encoding, then error correction capability is improved, but decoding latency and power consumption increase
Solution Approach 1:
The patent implements a variable-bit ECC encoder that dynamically adjusts the number of parity bits based on the memory device's error rate characteristics. The encoder transitions from a fixed number of parity bits to a dynamic configuration where the parity bit count varies according to measured error rates, thereby optimizing the balance between error correction capability and decoding performance at different stages of device life.
Solution Approach 2:
The system changes the parameter of parity bit count based on statistical error rate measurements. By monitoring error rates over time and adjusting the number of parity bits accordingly, the system adapts to the memory device's aging characteristics, using fewer parity bits when error rates are low and increasing them when error rates rise, thus resolving the contradiction between over-provisioning and under-provisioning.
2Reliability
If a large number of parity bits are used in ECC encoding, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The variable-bit ECC encoder dynamically adjusts the number of parity bits based on the memory device's error rate characteristics. The encoder transitions from a fixed number of parity bits to a dynamic configuration where the parity bit count varies according to measured error rates, thereby optimizing the balance between error correction capability and decoding performance at different stages of device life.
Solution Approach 2:
The system changes the parameter of parity bit count based on statistical error rate measurements. By monitoring error rates over time and adjusting the number of parity bits accordingly, the system adapts to the memory device's aging characteristics, using fewer parity bits when error rates are low and increasing them when error rates rise, thus resolving the contradiction between over-provisioning and under-provisioning.
3Reliability
If the number of parity bits is increased to handle end-of-life error rates, then error correction capability is maintained throughout device life, but decoding latency and power consumption increase even when not needed
Solution Approach 1:
The variable-bit ECC encoder dynamically adjusts the number of parity bits based on the memory device's error rate characteristics. The encoder transitions from a fixed number of parity bits to a dynamic configuration where the parity bit count varies according to measured error rates, thereby optimizing the balance between error correction capability and decoding performance at different stages of device life.
Solution Approach 2:
The system changes the parameter of parity bit count based on statistical error rate measurements. By monitoring error rates over time and adjusting the number of parity bits accordingly, the system adapts to the memory device's aging characteristics, using fewer parity bits when error rates are low and increasing them when error rates rise, thus resolving the contradiction between over-provisioning and under-provisioning.
Data Source
AI summary
A method may be performed at a data storage device that includes a memory and a controller. The method includes providing user data to a variable-bit error correction coding (ECC) encoder. The ECC encoder generates a first set of parity bits. A first number of parity bits in the first set of parity bits is determined based on stored counts of read errors. The method also includes storing the user data and the first set of parity bits to a memory of the data storage device.