Variable Bit Encoding NAND Flash Cell Endurance

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Solution Overview

Problem

Flash-based storage devices with multi-level cell (MLC) technology experience increased bit errors and shorter lifespan compared to single-level cell (SLC) devices, leading to premature retirement and reduced storage density, necessitating mechanisms to prolong the life of MLC devices.

Innovation Solution

Implementing a storage controller that detects trigger conditions, such as high bit error rates, to reconfigure non-volatile memory portions from a higher storage density (e.g., 2 bits per cell) to a lower storage density (e.g., 1 bit per cell), ensuring sufficient over-provisioning for background management processes and improving overall endurance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level cell (MLC) technology is used to increase storage density, then data storage density is improved, but bit error rate increases and device endurance deteriorates

Engineering Contradiction:

Improvestorage densityVSAvoidbit error rate

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The storage device dynamically changes its encoding mode from MLC to SLC based on real-time detection of bit error rates and wear conditions. The controller monitors error rates and automatically switches between different storage densities to maintain optimal reliability while maximizing storage capacity throughout the device's lifecycle.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the storage encoding parameter from 2 bits per cell (MLC) to 1 bit per cell (SLC) when wear or error rates indicate degradation. This parameter change allows the same physical cells to operate in a more reliable mode, extending their usable life and maintaining data integrity.

Inventive Principle:

Principle #35Parameter changes

2Quantity of substance

If multi-level cell (MLC) technology is used to increase storage density, then data storage density is improved, but device endurance deteriorates

Engineering Contradiction:

Improvestorage densityVSAvoiddevice endurance

Core Design Contradiction:

Quantity of substanceVSDuration of action of stationary object

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system performs preliminary monitoring of wear metrics and bit error rates to predict when MLC cells will degrade below acceptable thresholds. By switching to SLC mode proactively rather than reactively, the device prevents further degradation and extends overall endurance before failure occurs.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If storage density is reduced to improve reliability, then bit error rate is improved, but storage capacity deteriorates

Engineering Contradiction:

Improvebit error rateVSAvoidstorage capacity

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Inventive Principle:

Principle #10Preliminary action

4Quantity of substance

If MLC flash memory devices are used to increase storage density, then data storage density is improved, but device lifespan deteriorates

Engineering Contradiction:

Improvestorage densityVSAvoiddevice lifespan

Core Design Contradiction:

Quantity of substanceVSDuration of action of stationary object

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9891844B2Variable bit encoding per NAND flash cell to improve device endurance and extend life of flash-based storage devices

Publication Date: 2018.02.13 SANDISK TECHNOLOGIES LLC

AI summary

Systems, methods, and/or devices are used to implement variable bit encoding to improve device endurance and extend life of storage devices. In some embodiments, the method includes determining a current endurance metric for a plurality of non-volatile memory portions configured to store data encoded in a first encoding format and determining an estimated endurance metric for the plurality of non-volatile memory portions (e.g., corresponding to estimated endurance after reconfiguration of the one or more portions to store data encoded in a second encoding format), and in accordance with a determination that reconfiguration criteria are satisfied (e.g., the estimated endurance metric comprises an improvement over the current endurance metric), reconfiguring the one or more portions to store data encoded in the second encoding format.