Variable Bump Interconnect Layout for Reliable Passive Device Packaging

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Solution Overview

Problem

Existing technologies fail to effectively address the need for reliable and efficient packaging of electronic components, particularly in the need to reduce the size of packages, and there is a need to improve the packaging of electronic components in the packaging of electronic components.

Innovation Solution

The use of a package comprising a package comprising a package comprising a package interposer and a first integrated device coupled to a package interposer and a passive device comprising a package comprising a package comprising a passive device comprising a plurality of bump interconnects with varying sizes, specifically a first plurality of bump interconnects with a first minimum width and a second plurality of bump interconnects with a second minimum width greater than the first minimum width, providing robust and reliable connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform sized bump interconnects are used, then manufacturing is simpler, but reliability and robustness of connections are insufficient

Engineering Contradiction:
Improveconnection reliabilityVSAvoidbump interconnect size variation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the bump interconnect sizes at different locations on the passive device. Larger bump interconnects are positioned at corners and edges where mechanical stress is highest, while smaller bump interconnects are used in central areas. This non-uniform distribution optimizes connection reliability at each specific location based on its stress characteristics, resolving the contradiction between simplified manufacturing and enhanced reliability.

Inventive Principle:
Principle #3Local quality

2Volume of moving object

If package size is reduced, then integration density improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvepackage sizeVSAvoidbump interconnect alignment precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent changes the size parameter of bump interconnects based on their location within the package. By using larger bump interconnects at stress-prone locations and smaller ones elsewhere, the design accommodates variations in manufacturing precision while maintaining overall package compactness. This parameter variation allows the package to achieve high integration density without uniformly increasing manufacturing precision requirements across all interconnects.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260005176A1Package comprising a passive device with variable sized bump interconnects
Publication Date: 2026.01.01 QUALCOMM INC
  • US20260005176A1 patent drawing
  • US20260005176A1 patent drawing
  • US20260005176A1 patent drawing

AI summary

A package comprising a package interposer and a first integrated device coupled to the package interposer. The package interposer comprises a first metallization portion; a second metallization portion; a passive device located between the first metallization portion and the second metallization portion. The passive device comprises a plurality of bump interconnects. The plurality of bump interconnects comprise a first plurality of bump interconnects, where each bump interconnect from the first plurality of bump interconnects comprises a first minimum width; and a second plurality of bump interconnects, where each bump interconnect from the second plurality of bump interconnects comprises a second minimum width that is greater than the first minimum width.