Variable Capacitance Circuit High-Power Signal Integrity
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Solution Overview
Problem
Variable capacitance circuits in power amplifiers face challenges with high-power AC signals, leading to capacitor breakdown and waveform distortion due to excessive voltage, particularly when the impedance mismatch causes high-power output exceeding 30 dBm, and the PN junction of MOS transistors becomes conductive.
Innovation Solution
A variable capacitance circuit configuration with serially connected capacitors and a transistor switch, along with a bias circuit, is implemented to ensure that the capacitors operate within their withstanding voltage, using high-resistance resistors as leak paths to prevent voltage exceeding the power-supply voltage and maintain waveform integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a variable capacitance circuit is connected to the output terminal of a power amplifier to enable variable control of capacitance value, then the capacitance value can be adjusted for impedance matching, but the capacitor may break down due to exceptionally high-power voltage exceeding its withstanding voltage
Solution Approach 1:
The patent divides a single capacitor into multiple capacitors connected in series between the output terminal and ground. Each capacitor withstands a portion of the total voltage, so the sum of their individual withstanding voltages exceeds the maximum AC signal amplitude. This segmentation allows the variable capacitance circuit to handle high-power signals without capacitor breakdown while maintaining adjustable capacitance control.
2Adaptability or versatility
If the capacitance value is increased by turning MOS transistors ON to match impedance, then the output impedance can be adjusted, but the PN junction of the MOS transistor becomes conductive under high minus voltage, causing waveform distortion
Solution Approach 1:
The patent segments the voltage stress across the MOS transistor by introducing multiple capacitors in series. The voltage at any single point (including the drain of the MOS transistor) is limited by the voltage division across the capacitor string, preventing the drain voltage from dropping below the threshold that would forward-bias the PN junction. This maintains waveform integrity while enabling impedance adjustment.
Solution Approach 2:
The patent introduces bias circuits as intermediary elements that apply appropriate voltages to intermediate nodes between the series capacitors. These bias circuits act as mediators to control the voltage distribution across the capacitor string, ensuring that no single node experiences excessive voltage swings that would cause the MOS transistor's PN junction to conduct and distort the waveform.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration effectively prevents capacitor breakdown and maintains waveform linearity by ensuring the capacitors remain within their withstanding voltage limits, even under high-amplitude AC signals, and suppresses PN junction conduction, thereby enhancing the power amplifier's output signal quality.
Implementation Method 1
PN junction of a drain of MOS transistor within the variable capacitance circuit becomes conductive
Implementation Method 2
a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling a capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential
Data Source
AI summary
A variable capacitance circuit includes: a prescribed node, to which an alternate current signal with a reference potential as a center voltage is applied; a first capacitor connected to the prescribed node; a second capacitor connected between the first capacitor and the reference potential; a third capacitor and a transistor for controlling capacitance, provide between a first node between the second capacitor and the first capacitor, and the reference potential; and a bias circuit which applies a first bias voltage to a second node between the third capacitor and the transistor.