Variable Input Capacitance Circuit for Distributed Amplifier Gain Slope
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Solution Overview
Problem
Conventional distributed amplifiers experience a gain slope due to increasing input capacitance, leading to deteriorated frequency characteristics and output waveforms in high-speed communication systems, and existing solutions like Capacitive Source Degeneration circuits face yield variations and characteristic changes.
Innovation Solution
The implementation of an input transistor and input capacitance change circuit, along with a negative resistance change circuit, allows for adjustable capacitance and resistance values through variable resistors and capacitors, enabling compensation for manufacturing variations and maintaining optimal performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the input capacitance of the input transistor is large, then the amplifier can handle broader frequency ranges, but the loss of the pseudo transmission line increases and gain slope appears
Solution Approach 1:
The patent applies dynamics by making the input capacitance adjustable rather than fixed. A variable capacitor is introduced in parallel with the intrinsic input capacitance of the transistor, allowing the total input capacitance to be dynamically changed. This enables optimization of the transmission line characteristics to reduce loss while maintaining broadband operation capability.
Solution Approach 2:
The patent changes the capacitance parameter of the transmission line by adding a variable capacitor. This allows the electrical characteristics of the pseudo transmission line to be adjusted, thereby reducing the attenuation constant and suppressing gain slope while preserving the broadband frequency range.
2Reliability
If the input capacitance is reduced to suppress gain slope, then frequency characteristics improve, but the bandwidth capability decreases
Solution Approach 1:
The variable capacitor enables dynamic adjustment of input capacitance, allowing the system to optimize between frequency characteristic reliability and bandwidth adaptability depending on operating conditions. The capacitance can be tuned to achieve the desired balance.
Solution Approach 2:
By changing the capacitance parameter through the variable capacitor, the patent achieves suppression of gain slope while maintaining the ability to support broadband operation. The adjustable parameter allows simultaneous optimization of both frequency characteristics and bandwidth capability.
3Reliability
If conventional Capacitive Source Degeneration circuit is used to reduce attenuation constant, then gain slope is suppressed, but manufacturing yield varies and characteristics change
Solution Approach 1:
The patent replaces the fixed capacitance approach with a variable capacitor that can be adjusted after manufacturing. This eliminates the sensitivity to manufacturing variations because the optimal capacitance value can be set post-fabrication, ensuring consistent gain slope suppression across different manufacturing batches.
Solution Approach 2:
By making the capacitance parameter adjustable through a variable capacitor, the patent removes the dependency on precise manufacturing tolerances. The capacitance value can be optimized after manufacturing, thereby suppressing gain slope reliably while maintaining high manufacturing yield without characteristic variations.
Data Source
Figure 1
Figure 2
Figure 3A~3B
AI summary
A resistor (9-1) and a resistor (11-1) are connected in parallel with each other between a source of an input transistor (7-1) and the ground. A switch (12-1) is provided between the resistor (11-1) and the source. A variable resistor circuit may be constituted by the resistor (9-1), the resistor (11-1) and the switch (12-1). Further, a capacitor (10-1) and a variable capacitor (13-1) are connected in series with each other between the source and the ground. A control terminal (14-1) to which a voltage is applied when capacitance of the variable capacitor (13-1) is controlled is provided between the capacitor (10-1) and the variable capacitor (13-1). A variable capacitor circuit may be constituted by the capacitor (10-1) and the variable capacitor (13-1). An input capacitance change circuit may be constituted by the variable resistor circuit and the variable capacitor circuit.