Variable-Capacitance Logic Cell for Low Static and Dynamic Power
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Solution Overview
Problem
Conventional logic circuits, particularly those based on CMOS technology, face challenges in reducing power consumption due to limitations in dynamic and static energy dissipation, with adiabatic logic circuits experiencing residual non-adiabatic energy dissipation and microelectromechanical switches encountering high on-state resistances leading to additional energy dissipation.
Innovation Solution
The implementation of logic cells utilizing variable-capacitance capacitors with control electrodes, where the capacitance is varied to perform logic functions, allowing for zero or negligible static consumption and reduced dynamic consumption by eliminating residual series resistances and threshold effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage VDD is reduced to reduce dynamic consumption, then dynamic energy dissipation decreases, but leakage currents increase causing static consumption to increase
Solution Approach 1:
The patent replaces the conventional resistive voltage divider bridge architecture with a capacitive voltage divider bridge architecture. Instead of using transistors as controllable resistors, the invention uses variable capacitance elements to achieve logic functions. This substitution eliminates the fundamental mechanism that causes the trade-off between dynamic and static power consumption in conventional CMOS circuits.
Solution Approach 2:
The invention changes the fundamental operating parameter from resistance control (in conventional CMOS) to capacitance control. By using variable capacitance elements whose capacitance can be modulated by control signals, the system achieves logic functionality without the leakage current problems inherent in resistive-based systems, especially at low supply voltages.
2Use of energy by moving object
If adiabatic logic is used to reduce dynamic consumption, then energy dissipation during capacitor charging/discharging decreases, but residual non-adiabatic energy dissipation remains due to transistor threshold voltages
Solution Approach 1:
The patent eliminates the source of residual non-adiabatic dissipation by replacing transistors with variable capacitance elements. Since capacitors do not have threshold voltages like transistors, the adiabatic charging and discharging process can be completed without the residual energy loss that occurs when transistor thresholds prevent complete voltage transitions.
3Loss of energy
If microelectromechanical switches are used to reduce static consumption, then leakage currents decrease, but high on-state resistances cause additional energy dissipation
Solution Approach 1:
The patent replaces microelectromechanical switches with variable capacitance elements. This substitution eliminates the high on-state resistance problem inherent in MEMS switches while maintaining the low static power consumption advantage. Capacitive elements inherently have no resistive losses in their ideal form.
4Ease of operation
If transistor-based logic cells are used, then logic functions can be performed, but leakage currents cause non-zero static consumption
Solution Approach 1:
The patent replaces transistor-based logic cells with capacitor-based logic cells. In the capacitive voltage divider bridge architecture, logic functions are achieved by varying capacitance values in response to input signals, rather than using transistor switching. This fundamental substitution eliminates leakage currents as the source of static power consumption while preserving logic functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in logic cells with zero or negligible static consumption and reduced dynamic consumption, outperforming traditional transistor-based technologies by minimizing leakage currents and avoiding the drawbacks of microelectromechanical switches.
Implementation Method 1
each logic cell comprising at least a first variable-capacitance capacitor having first and second main electrodes separated by an insulating region, and first and second control electrodes electrically insulated from the first and second main electrodes and adapted to receive a control signal to vary the capacitance between the first and second main electrodes
Data Source
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AI summary
The invention relates to a logic cell for an integrated circuit comprising at least a first variable-capacitance capacitor (C1) having first and second main electrodes separated by an insulating region, and a third control electrode adapted to receive a control voltage referenced by relative to a reference node (GND) of the cell to vary the capacitance between the first and second main electrodes, the third electrode being connected to a node (el) for applying a first logic input signal (A ) of the cell, and the first and second electrodes being respectively connected to a node (VDD) for applying a cell supply voltage and to a node(s) for supplying a logic output signal ( S) of the cell.