Variable-Capacitor Transconductance Circuit for Fine Delay Tuning
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Solution Overview
Problem
Existing electronic circuits face challenges in precisely controlling propagation delay, which is critical for high-speed digital applications like phased locked loops and delay locked loops, due to limitations in adjusting output current and load capacitance.
Innovation Solution
A controlled transconductance circuit (CTC) with a variable capacitor connected to a transistor's source terminal, where the transconductance is proportional to the capacitance, allowing for precise control of propagation delay through a control signal, enabling fine resolution and high-speed linear delay in digital circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional methods of adjusting output current and load capacitance are used, then propagation delay can be controlled, but the control precision is insufficient for high-speed digital applications
Solution Approach 1:
The patent changes the parameter being controlled from output current or load capacitance directly to the transconductance of the transistor. By controlling the transconductance parameter through a control voltage applied to the gate terminal, the propagation delay can be precisely adjusted. This parameter transformation enables fine-resolution control in the femto-second range, resolving the contradiction between control precision and control resolution.
2Manufacturing precision
If the propagation delay is adjusted by controlling output current, then the delay can be modified, but the adjustment granularity is coarse and lacks fine resolution
Solution Approach 1:
The invention transforms the control mechanism by changing from direct output current control to transconductance control. The transconductance parameter, which relates gate voltage to drain current, provides a more sensitive and finely controllable parameter. By applying a control voltage to the gate terminal that modulates the transconductance, fine-resolution delay adjustment is achieved without significantly increasing device complexity, as it utilizes the inherent voltage-controlled特性 of the transistor.
3Reliability
If conventional delay control methods are used, then basic delay adjustment is possible, but the linearity and resolution are insufficient for high-speed applications
Solution Approach 1:
The patent improves reliability and linearity by controlling the transconductance parameter instead of output current directly. The transconductance of a transistor exhibits more linear behavior with respect to gate voltage control compared to the nonlinear relationship between output current and delay. This parameter transformation enables predictable and linear delay adjustment, enhancing the reliability of delay control for high-speed digital applications such as phased locked loops and delay locked loops.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for precise adjustment of propagation delay within femto-second ranges, enhancing the performance of digital phased locked loops and delay locked loops with improved resolution and linearity, suitable for high-speed applications.
Implementation Method 1
a variable capacitor connected between the transistor source terminal and a constant voltage terminal where the constant voltage terminal is adapted to receive a constant voltage
Data Source
AI summary
A controlled transconductance circuit (CTC) is disclosed. The CTC includes (i) a transistor comprising a drain terminal, a gate terminal, and a transistor source terminal, (ii) a biasing circuit element connected between the transistor source terminal and a CTC source terminal, and a variable capacitor connected between the transistor source terminal and a constant voltage terminal where the constant voltage terminal is adapted to receive a constant voltage, and (iii) a CTC control terminal adapted to control a transconductance of the CTC by controlling a capacitance of the variable capacitor.