Variable Capacitor Match Network With Sub-Binary Capacitance Steps
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Solution Overview
Problem
Variable capacitors in impedance-matching networks for plasma processing face challenges due to varying contributions from switched capacitors, leading to gaps in achievable capacitance values, which can result in inadequate impedance matching.
Innovation Solution
Implementing a sub-binary sequence of fractional capacitor values, considering the effects of the interconnect network and component tolerances, to minimize gaps in capacitance values and ensure accurate impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a binary sequence of capacitor values is used in the variable capacitor, then the device complexity is reduced and ease of manufacture is improved, but gaps in achievable capacitance values occur leading to inadequate impedance matching precision
Solution Approach 1:
The patent changes the capacitor value sequence from a binary sequence to a sub-binary sequence, where the ratio between successive capacitor values is less than 2:1. This parameter change in the sequence structure eliminates gaps in achievable capacitance values while maintaining a manageable number of capacitors, thereby improving impedance matching precision without excessively increasing device complexity.
Solution Approach 2:
The variable capacitor is segmented into multiple switched capacitors with specifically designed sub-binary values. By dividing the total capacitance range into discrete segments with ratios less than 2:1, the patent ensures continuous coverage of the capacitance range without gaps, allowing precise impedance matching across varying plasma load conditions.
2Manufacturing precision
If the number of switched capacitors is increased to reduce gaps in capacitance values, then impedance matching precision is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
Instead of increasing the number of capacitors, the patent changes the value parameters of the capacitors to follow a sub-binary sequence. This approach achieves continuous capacitance coverage with fewer components, simplifying manufacturing while maintaining high precision in impedance matching.
3Reliability
If standard binary capacitor values are used, then the ease of operation and control is improved, but gaps in capacitance coverage occur reducing reliability of impedance matching
Solution Approach 1:
The patent modifies the capacitor value parameters from standard binary values to sub-binary values with ratios less than 2:1. This ensures that all intermediate capacitance values between minimum and maximum are achievable, eliminating gaps and ensuring reliable impedance matching across the entire operating range while maintaining digital control capability.
Data Source
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AI summary
This disclosure describes systems, methods, and apparatus for a digital-to-analog (DAC) converter, that can be part of a variable capacitor and/or a match network. The DAC can include a digital input, an analog output, N contributors (e.g., switched capacitors), and an interconnect topology connecting the N contributors, generating a sum of their contributions (e.g., sum of capacitances), and providing the sum to the analog output. The N contributors can form a sub-binary sequence when their contributions to the sum are ordered by average contribution. Also, the gap size between a maximum contribution of one contributor, and a minimum contribution of a subsequent contributor, is less than D, where D is less than or equal to two time a maximum contribution of the first or smallest of the N contributors.