Variable Capacitor Switching Around Current Zero-Crossings
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Solution Overview
Problem
Existing power electronics face challenges in efficiently controlling variable reactive circuit components to avoid damage from current surges, often sacrificing efficiency for safe operation, particularly in contexts like impedance matching networks and wireless energy transfer systems.
Innovation Solution
A control system and process for a variable reactive circuit component, including a capacitor and transistors with control circuitry that adjusts effective capacitance by detecting zero-crossings of an input current and controlling transistor switching based on delay periods and counter values, minimizing body-diode conduction time to reduce power losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lossy diode conduction currents are used to clamp component voltages at zero, then safe operation is ensured, but power efficiency deteriorates
Solution Approach 1:
The patent extracts the harmful body-diode conduction from the system by implementing a controlled switching mechanism that prevents the body-diode from conducting during normal operation. The transistor switching circuit is designed to keep the body-diode reverse-biased or non-conducting, removing the source of power loss while maintaining the protective function through active control rather than passive diode conduction.
Solution Approach 2:
The patent changes the operational parameters of the transistor switching element by controlling the timing and duration of body-diode conduction. By adjusting the delay period and counter values that control transistor switching, the patent minimizes the conduction time of the body-diode, thereby reducing power losses while still providing necessary voltage clamping protection during transient conditions.
2Loss of energy
If transistor switching is controlled to minimize body-diode conduction time, then power efficiency is improved, but control complexity increases
Solution Approach 1:
The patent implements periodic transistor switching controlled by a counter that operates in synchronization with the AC input cycle. The counter generates periodic gate signals that turn the transistor on and off at specific intervals, creating a rhythmic switching pattern that minimizes body-diode conduction. This periodic control approach simplifies the overall control strategy compared to continuous complex monitoring while achieving efficient power operation.
Solution Approach 2:
The patent incorporates feedback mechanisms where the control circuitry monitors the AC input current zero-crossings and uses this information to adjust the transistor switching timing. The counter is initialized and controlled based on detected zero-crossing events, creating a feedback loop that automatically synchronizes the switching pattern with the input waveform, thereby optimizing body-diode conduction minimization without requiring complex external control.
3Productivity
If delay periods are used to control transistor switching timing, then operational efficiency is enhanced, but response time increases
Solution Approach 1:
The patent implements preliminary action by pre-calculating and pre-setting the delay periods and counter values before the AC input cycle begins. The control circuitry is pre-configured with the optimal switching timing parameters, allowing the transistor to be switched at the precise moment needed to minimize body-diode conduction. This preliminary preparation eliminates the need for complex real-time calculations during operation, maintaining fast response while achieving high operational efficiency.
Data Source
AI summary
Methods, systems, and devices for controlling a variable capacitor. One aspect features a variable capacitance device that includes a capacitor, a first transistor, a second transistor, and control circuitry. The control circuitry is configured to adjust an effective capacitance of the capacitor by performing operations including detecting a zero-crossing of an input current at a first time. Switching off the first transistor. Estimating a first delay period for switching the first transistor on when a voltage across the capacitor is zero. Switching on the first transistor after the first delay period from the first time. Detecting a zero-crossing of the input current at a second time. Switching off the second transistor. Estimating a second delay period for switching the second transistor on when a voltage across the capacitor is zero. Switching on the second transistor after the second delay period from the second time.