Variable CDAC Calibration for ADC Linearity and Gain Matching
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Solution Overview
Problem
Successive-approximation ADC circuitry using capacitive digital-to-analogue converters (CDAC) suffers from performance issues related to linearity and gain mismatch, particularly in sub-ADC units of overall ADC circuitry.
Innovation Solution
The ADC circuitry employs a set of sub-ADC units with individually-switchable capacitors, including variable capacitors, to configure different test configurations for optimizing linearity and gain, where control circuitry adjusts capacitance and voltage levels to achieve improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If successive-approximation ADC circuitry uses capacitive digital-to-analogue converters (CDAC), then conversion speed and architecture simplicity are improved, but linearity and gain mismatch performance deteriorate
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting capacitor values and voltage levels during the conversion process. The CDAC unit uses variable capacitors that can be switched to different capacitance values, and the reference voltage can be adjusted, allowing the system to optimize linearity and gain characteristics while maintaining the successive-approximation architecture's speed advantages
Solution Approach 2:
The invention introduces dynamic elements into the CDAC architecture by making capacitors switchable and voltage levels adjustable during operation. This dynamic configuration allows the system to adapt its characteristics for each conversion cycle, improving linearity and gain mismatch performance without sacrificing the inherent speed of the successive-approximation approach
2Productivity
If multiple sub-ADC units are used in parallel, then overall conversion capability and sample rate are improved, but gain mismatch between units deteriorates
Solution Approach 1:
The patent implements feedback mechanisms where the performance characteristics of each sub-ADC unit are monitored and used to adjust operating parameters. By measuring actual gain and linearity of individual units and adjusting capacitor configurations or voltage levels accordingly, the system compensates for manufacturing variations and reduces gain mismatch between parallel units
Solution Approach 2:
The invention applies local quality by allowing each sub-ADC unit to have independently optimized parameters. Each unit can have its own capacitor switching configuration and voltage level settings, enabling tailored optimization for each unit's specific characteristics while maintaining overall system performance
Data Source
AI summary
Mixed-signal circuitry including a set of capacitive digital-to-analogue converter, CDAC, units for carrying out digital-to-analogue conversion operations to convert respective digital values into corresponding analogue values; and control circuitry, where: each CDAC unit includes an array of capacitors at least some of which are configured to be individually-switched dependent on the digital values, the capacitors configured to have nominal capacitances; a given capacitor of the array of capacitors in each of the CDAC units is a target capacitor; the set of CDAC units includes a plurality of sub-sets of CDAC units; at least one of the target capacitors per sub-set of CDAC units is a variable capacitor, controllable by the control circuitry to have any one of a plurality of nominal capacitances defined by the configuration of that capacitor.