Variable Channel Width FinFET via Selective Oxidation

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Solution Overview

Problem

Current semiconductor manufacturing technologies for fin-type field-effect-transistors (FinFETs) are limited by discretized channel widths, which restrict design flexibility and performance, particularly in densely populated areas like static random access memory (SRAM) devices, due to the inability to adjust the widths of pass gate, pull-up, and pull-down transistors effectively.

Innovation Solution

A method is developed to form FinFETs with variable channel widths by creating fins of different heights through selective dielectric material deposition, oxidation, and etching processes, allowing for the formation of FinFETs with multiple channel widths by controlling the height of the fins, which determines the channel width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If FinFETs are manufactured using conventional methods with discretized channel widths, then manufacturing process simplicity is maintained, but design flexibility and device performance are significantly limited

Engineering Contradiction:
Improvedesign flexibilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fin structure is segmented into multiple height levels by forming oxide sections at different depths within the fin. This segmentation allows different portions of the fin to serve as channels for transistors with different channel widths, enabling design flexibility without requiring completely different fin structures for each transistor type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces vertical dimensionality variation within the fin structure by creating oxide sections at different depths. Instead of varying channel width only in the horizontal plane, the invention utilizes the vertical depth dimension to create multiple effective channel widths from a single fin, thereby improving adaptability without proportionally increasing manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If FinFETs are manufactured with discretized channel widths according to existing ground rules, then manufacturing precision is maintained within standard limits, but the ability to adjust transistor widths for different performance requirements is lost

Engineering Contradiction:
Improvetransistor width adjustment capabilityVSAvoidchannel width precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

Different regions of the fin structure are given different local qualities through selective oxidation. The oxide sections are formed at specific depths and positions to create localized variations in fin height, allowing precise control of channel width for specific transistor locations while maintaining standard manufacturing precision for the overall structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameters of the fin structure by introducing oxide sections that modify the effective fin height and thus the channel width. By controlling the depth, width, and position of these oxide sections, precise adjustment of transistor width is achieved while using standard manufacturing processes, thereby maintaining manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If multiple FinFETs are densely populated on a single chip with variable channel widths required, then device density is improved, but the complexity of meeting various performance requirements increases

Engineering Contradiction:
Improvedevice densityVSAvoidperformance specification complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

A single fin structure with embedded oxide sections serves multiple functions by providing different effective channel widths for different transistor types (pass gate, pull-up, pull-down) within the same physical footprint. This multi-functionality allows dense packing of various transistor types while meeting diverse performance requirements without increasing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The fin is segmented into multiple functional regions by the oxide sections, where each segment can serve a different transistor function. This segmentation allows a single fin to replace what would traditionally require multiple separate fins of different widths, thereby increasing device density while managing performance specification complexity through a unified structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the manufacturing of FinFETs with adjustable channel widths, enhancing design flexibility and performance by allowing for varied transistor widths, particularly in SRAM devices, thereby improving device density and performance capabilities.

Implementation Method 1

exposing a middle third portion of the first and second groups of fins to an oxidizing environment to create an oxide section that separates the top first portion from the bottom second portion

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS8896067B2Method of forming finFET of variable channel width
Publication Date: 2014.11.25 GLOBALFOUNDRIES US INC
  • US8896067B2 patent drawing
  • US8896067B2 patent drawing
  • US8896067B2 patent drawing

AI summary

Embodiments of present invention provide a method of forming a first and a second group of fins on a substrate; covering a top first portion of the first and second groups of fins with a first dielectric material; covering a bottom second portion of the first and second groups of fins with a second dielectric material, the bottom second portion of the first group and the second group of fins having a same height; exposing a middle third portion of the first and second groups of fins to an oxidizing environment to create an oxide section that separates the top first portion from the bottom second portion of the first and second groups of fins; and forming one or more fin-type field-effect-transistors (FinFETs) using the top first portion of the first and second groups of fins as fins under gates of the one or more FinFETs.