Variable Clock Frequency Model Simulation for Time-Accuracy Trade-offs
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Solution Overview
Problem
In model base development, the increasing complexity of systems leads to delays in development completion schedules due to the inability of document reviews to accurately confirm the behavior and performance of systems, as actual system behavior differs from simple calculations, necessitating a more accurate simulation method.
Innovation Solution
A program executed on an information processing device that adjusts the clock frequency of specific blocks within a model simulation, allowing certain blocks to operate at a lower frequency than others, thereby reducing simulation time without compromising accuracy, by deciding a new clock frequency for a target block and setting conversion ratios for conversion blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a detailed model base is used to improve simulation accuracy, then the accuracy of behavior and performance estimation is improved, but the simulation time is enormously increased
Solution Approach 1:
The model base is segmented into multiple blocks with different levels of detail. Some blocks use detailed models while others use simplified models, allowing the system to balance accuracy and simulation time by selectively applying detail only where necessary.
Solution Approach 2:
Different parts of the model base have different qualities of detail. Critical blocks that significantly impact simulation accuracy are modeled in detail, while less critical blocks use simplified representations, optimizing the overall simulation efficiency.
2Loss of time
If a simple model base is used to reduce simulation time, then the simulation time is reduced, but the accuracy of behavior and performance estimation deteriorates
Solution Approach 1:
The model base dynamically adjusts the level of detail in different blocks based on simulation requirements. The system can switch between detailed and simplified models in different blocks during the simulation process to optimize both accuracy and time efficiency.
Solution Approach 2:
The detail level of model blocks is controlled through parameters such as clock frequency. By adjusting these parameters, the system can change the effective detail of blocks without physically modifying the model structure, enabling flexible optimization of simulation performance.
3Loss of time
If the clock frequency of all blocks is reduced to decrease simulation time, then the simulation time is reduced, but the operational accuracy and synchronization of the model deteriorates
Solution Approach 1:
The model is divided into blocks that can operate at different clock frequencies. This segmentation allows each block to be optimized independently, with critical blocks maintaining higher frequencies for accuracy while less critical blocks use lower frequencies to reduce overall simulation time.
Solution Approach 2:
Conversion blocks act as intermediaries between blocks operating at different clock frequencies. These conversion blocks ensure proper data synchronization and signal transmission between blocks with different operational speeds, maintaining model reliability despite frequency variations.
Data Source
AI summary
A program is executed in an information processing device including a processor and a memory. The program allows the processor to execute a step of, on the basis of a simulation result of a model in the case where a series of blocks having an input block, one or more operation blocks, and an output block are allowed to operate at a predetermined clock frequency, deciding a new clock frequency of a target block that is allowed to operate at a clock frequency lower than the predetermined clock frequency, and a step of setting the conversion ratios of conversion blocks so as to execute a simulation of the model in which the target block is allowed to operate at the new clock frequency lower than the predetermined clock frequency and the remaining blocks are allowed to operate at the predetermined clock frequency.