Variable Clock Frequency Serial Interface for Mobile Devices
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Solution Overview
Problem
Mobile devices face bandwidth limitations between components, hindering performance improvements due to the need for a single bandwidth for both data transmission and reception in serial interfaces, which restricts function and efficiency.
Innovation Solution
Implementing a serial interface with varying write and read bandwidths by adjusting the clock signal frequency based on data direction, allowing a higher frequency for data transmission and a lower frequency for data reception, thereby optimizing bandwidth usage without additional clock modulation circuits in the slave device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a serial interface is used to reduce the number of pins, then manufacturing cost is reduced, but bandwidth is limited because the same channel must handle both data transmission and reception at the same speed
Solution Approach 1:
The patent applies dynamics by making the clock signal frequency variable rather than fixed. The master device dynamically adjusts the clock frequency based on the operation direction: using a first frequency for write operations and a second frequency for read operations. This dynamic adjustment allows the serial interface to optimize bandwidth for each direction while maintaining cost-effectiveness through pin reduction.
Solution Approach 2:
The patent changes the parameter of clock frequency to resolve the bandwidth limitation. By varying the clock frequency parameter according to operation type (write vs. read), the system achieves different effective bandwidths for each direction. This parameter change enables the serial interface to overcome the symmetric bandwidth constraint while keeping the physical connection simple.
2Adaptability or versatility
If the number of devices or components is increased to meet user needs, then function is improved, but bandwidth limitations between devices become more difficult to overcome
Solution Approach 1:
The dynamic clock frequency adjustment enables each serial interface to adapt its bandwidth characteristics to the specific operation requirements. This allows multiple devices to communicate efficiently with differentiated bandwidth needs, supporting increased system functionality without being constrained by uniform bandwidth limitations across all device interactions.
3Device complexity
If a single bandwidth is used for both data transmission and reception in a serial interface, then device complexity is reduced, but performance is hindered due to bandwidth limitations
Solution Approach 1:
The patent introduces dynamic clock frequency control to achieve different effective bandwidths for write and read operations while maintaining relatively simple device architecture. The master device controls the clock frequency based on operation direction, enabling performance optimization without requiring complex additional hardware in the slave device.
Solution Approach 2:
By changing the clock frequency parameter according to operation type, the system achieves asymmetric bandwidth performance (different write and read speeds) while keeping the physical serial interface structure simple. This parameter-based approach avoids the need for separate physical channels or complex modulation circuits in the slave device.
Data Source
AI summary
A mobile device includes a slave device that receives first data provided to a serial data line in synchronization with a clock signal provided through a serial clock line, and outputs second data to the serial data line in synchronization with the clock signal; and a master device that generates the clock signal and provides the first data to the serial data line in synchronization with the generated clock signal, or receives the second data output to the serial data line in synchronization with the clock signal. The master device generates the clock signal of a first frequency upon transmitting the first data, and generates the clock signal of a second frequency, which is lower than the first frequency, upon receiving the second data.