Variable Clock Generation for Fast Voltage Droop Response
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional clock generators face inefficiencies and power consumption issues when handling voltage droops due to their reliance on multiplexor circuits, which introduce delays and additional circuitry, whereas a solution that does not use multiplexors is desired to manage sudden changes in power demand and maintain stable voltage supply for integrated circuits and processors.
Innovation Solution
A clock generation circuit with a voltage-droop detector and frequency-locked loop that reduces the system clock frequency by sinking current away from the oscillator when a voltage droop is detected, eliminating the need for multiplexors by using a current control signal to adjust the frequency, and biasing the signal back to its initial state once the droop is cleared, thereby maintaining efficient operation without introducing delays or phase switching jitter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiplexor circuits are used to handle voltage droops in conventional clock generators, then the clock frequency can be adjusted, but delays and additional circuitry are introduced
Solution Approach 1:
The patent removes the multiplexor circuit from the clock generation system entirely. Instead of using a multiplexor to switch between different clock sources or frequencies, the invention uses a voltage-droop detector that directly controls an oscillator to adjust its frequency output in response to detected voltage droops, eliminating the delay and complexity associated with multiplexor-based frequency adjustment
Solution Approach 2:
The voltage-droop detector continuously monitors the supply voltage and proactively adjusts the oscillator frequency before timing failures can occur. By detecting voltage droops early and preemptively reducing the clock frequency, the system prevents timing violations rather than reacting to them after they occur
2Adaptability or versatility
If multiplexor circuits are used to handle voltage droops, then frequency adjustment is possible, but additional circuitry and complexity are introduced
Solution Approach 1:
The patent eliminates the multiplexor circuit and its associated control logic, replacing it with a simpler voltage-droop detector and oscillator control mechanism. This extraction of the multiplexor function reduces circuit complexity while maintaining the essential capability to adjust frequency in response to voltage droops
Solution Approach 2:
The voltage-droop detector serves multiple functions: it monitors supply voltage, detects droop conditions, and directly controls the oscillator frequency adjustment. By consolidating these functions into a single control path rather than using separate multiplexor and control logic circuits, the system achieves frequency adjustment capability with reduced overall circuit complexity
3Use of energy by moving object
If clock frequency is reduced during voltage droop, then power demand decreases, but timing margins must be maintained
Solution Approach 1:
The voltage-droop detector provides continuous feedback about the supply voltage condition to the oscillator control mechanism. When a voltage droop is detected, the system reduces the clock frequency to lower power consumption, and when normal voltage is restored, the frequency is increased back to its original value. This feedback-based dynamic adjustment ensures timing margins are maintained by adapting the frequency to actual voltage conditions
Solution Approach 2:
The clock frequency is made dynamic rather than fixed, allowing it to change in real-time based on voltage conditions. The system transitions between different operating states (normal frequency and reduced frequency) depending on whether voltage droops are detected, enabling the system to optimize power consumption while maintaining reliability by adjusting performance to match available power
Data Source
AI summary
A variable frequency clock generator. In aspects, a clock generator includes a droop detector circuit configured to monitor a voltage supply to an integrated circuit. If the supply voltage falls below a specific threshold, a droop voltage flag may be set such that a frequency-locked loop is triggered into a droop voltage mode for handling the voltage droop at the supply voltage. In response, a current control signal that is input to an oscillator that generates a system clock signal is reduced by sinking current away from the current control signal to the oscillator. This results in an immediate reduction on the system clock frequency. Such a state remains until the voltage droop has dissipated when the current path is removed for sinking some of the current.