Variable-Width Core Vias for Thick-Package Signal Integrity

Solution Overview

Problem

Chip packages with thicker cores and longer core vias experience impedance variations, higher return loss, and resonance issues that affect signal integrity, which current organic structure technology cannot rectify.

Innovation Solution

Implementing semiconductor packages with multilayer cores and variable or offset vias to minimize impedance variations and resonance by varying the width or offsetting portions of the vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If the core thickness is increased to control package warpage, then package warpage is reduced, but impedance variations and return loss increase

Engineering Contradiction:

Improvepackage warpage controlVSAvoidsignal integrity

Core Design Contradiction:

Stability of the object's compositionVSReliability

Solution Approach 1:

The via structure is modified to have non-uniform properties along its length. Specifically, the via includes a first portion with a first cross-sectional area and a second portion with a second cross-sectional area, creating local variations in impedance characteristics. This allows different sections of the via to compensate for each other, reducing overall impedance variations while maintaining the thicker core structure for warpage control.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The via cross-sectional area is changed along its length to optimize electrical performance. By varying the cross-sectional area (creating tapers or offsets), the impedance profile of the via is modified to compensate for the increased electrical length caused by thicker cores. This parameter change enables maintaining signal integrity despite the longer via path through thicker dielectric layers.

Inventive Principle:

Principle #35Parameter changes

2Stability of the object's composition

If the core thickness is increased to control package warpage, then package warpage is reduced, but resonance in insertion loss increases

Engineering Contradiction:

Improvepackage warpage controlVSAvoidresonance in insertion loss

Core Design Contradiction:

Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The via structure is modified to have non-uniform properties along its length. Specifically, the via includes a first portion with a first cross-sectional area and a second portion with a second cross-sectional area, creating local variations in impedance characteristics. This allows different sections of the via to compensate for each other, reducing overall impedance variations while maintaining the thicker core structure for warpage control.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The via cross-sectional area is changed along its length to optimize electrical performance. By varying the cross-sectional area (creating tapers or offsets), the impedance profile of the via is modified to compensate for the increased electrical length caused by thicker cores. This parameter change enables maintaining signal integrity despite the longer via path through thicker dielectric layers.

Inventive Principle:

Principle #35Parameter changes

3Strength

If longer core vias are used to connect layers in thicker cores, then structural integrity is improved, but impedance variations and return loss increase

Engineering Contradiction:

Improvestructural integrityVSAvoidsignal integrity

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The via structure is modified to have non-uniform properties along its length. Specifically, the via includes a first portion with a first cross-sectional area and a second portion with a second cross-sectional area, creating local variations in impedance characteristics. This allows different sections of the via to compensate for each other, reducing overall impedance variations while maintaining the thicker core structure for warpage control.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The via cross-sectional area is changed along its length to optimize electrical performance. By varying the cross-sectional area (creating tapers or offsets), the impedance profile of the via is modified to compensate for the increased electrical length caused by thicker cores. This parameter change enables maintaining signal integrity despite the longer via path through thicker dielectric layers.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250279341A1Multilayer Cores, Variable Width Vias, and Offset Vias

Publication Date: 2025.09.04 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD

AI summary

Novel tools and techniques are provided for implementing a semiconductor package or a chip package, and more particularly, for implementing a semiconductor package or a chip package including a core or a multilayer core having one or more variable width vias or one or more offset vias. In various embodiments, an apparatus includes a substrate. The substrate includes a core. The core may include one or more vias extending through the core. At least one via of the one or more vias includes a cross-section that varies along a length of the at least one via as the via extends through the core. The cross-section of the via may vary based on at least one of varying a width of the at least one via or offsetting a first portion of the at least one via from a second portion of the at least one via.