Variable-Current Integrator Biasing for Low-Power Sigma-Delta ADCs
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Solution Overview
Problem
Existing sigma-delta analog-to-digital converters (ADCs) face high power consumption due to power-consuming analog circuits in their loop filters, particularly integrators, which is a challenge for low-power applications.
Innovation Solution
An integrator operating on a variable current is introduced, with different current values used in the sampling and integration phases to reduce power consumption without affecting performance, utilizing an operational amplifier with a bias circuit and variable current source to control bias conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a constant high current is used in the integrator to meet the speed requirement during integration phase, then the operation speed is improved, but the power consumption increases
Solution Approach 1:
The patent applies dynamics by making the bias current variable rather than constant. The bias circuit dynamically adjusts the bias current based on the operational phase: providing a first bias current during the integration phase for high-speed operation, and a second bias current (lower than the first) during the sampling phase for reduced power consumption. This dynamic adaptation resolves the contradiction between maintaining high speed and reducing power consumption.
Solution Approach 2:
The patent changes the current parameter adaptively according to different operational phases. The bias current parameter is switched between two distinct values: a higher current during integration to satisfy speed requirements, and a lower current during sampling to reduce power consumption. This parameter change strategy allows the system to optimize both speed and power consumption at different times.
2Use of energy by moving object
If a lower current is used to reduce power consumption, then the power consumption is reduced, but the operation speed decreases
Solution Approach 1:
The patent employs periodic action by alternating between two operational modes with different current levels. During the integration phase, a higher current is applied to ensure adequate operation speed. During the sampling phase, a lower current is applied to reduce power consumption. This periodic switching between high-current and low-current modes allows the system to achieve both low power consumption and adequate speed performance at different times in the operational cycle.
Data Source
AI summary
An integrator operating based on a variable current is provided. The integrator includes an operational amplifier, wherein the operational amplifier includes an amplifying stage circuit and a bias circuit. The amplifying stage circuit is configured to provide an amplification gain. The bias circuit is coupled to the amplifying stage circuit and is configured to control a bias condition of the amplifying stage circuit according to the variable current output from a variable current source. In a sampling phase of the integrator, the variable current source switches the variable current to a sampling current value. In an integration phase of the integrator, the variable current source switches the variable current to an integration current value. More particularly, the sampling current value is less than the integration current value.