Variable Cycle Memory Control for Predictable Power
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Solution Overview
Problem
Current non-volatile memory solutions in portable biomedical devices suffer from high power consumption and unpredictable energy expenditure due to inefficient data storage mechanisms, limiting battery autonomy and recording times in devices like ambulatory cardiac monitors.
Innovation Solution
A memory control system that divides write and read operations into variable cycles with a power management unit to authorize or prevent these operations, allowing them only during known power availability, thereby controlling and predicting power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If flash memory is used for data storage in portable biomedical devices, then data storage capacity is improved, but power consumption increases
Solution Approach 1:
The patent segments the data storage system into multiple components: volatile memory for active data handling, flash memory for long-term storage, and a memory controller for coordination. This segmentation allows the system to use only the necessary memory type for each operation, reducing overall power consumption while maintaining adequate storage capacity.
Solution Approach 2:
The system performs preliminary actions by pre-processing and filtering sensor data before storing it in flash memory. The memory controller prepares data in volatile memory first, validating and organizing it before transferring to flash storage. This reduces the frequency and volume of flash memory write operations, thereby reducing power consumption.
2Reliability
If memory write validation operations are performed to ensure data integrity, then reliability is improved, but power consumption and operation time increase
Solution Approach 1:
The patent applies partial validation by performing error checking and correction only on critical data blocks or when specific error conditions are detected, rather than validating every single write operation. The memory controller uses partial page validation and selective retransmission, reducing the overall validation overhead while maintaining data integrity for essential information.
3Productivity
If memory operations are performed frequently to store sensor data, then data storage functionality is improved, but unpredictable power consumption occurs
Solution Approach 1:
The system implements periodic memory operations by buffering sensor data in volatile memory and performing batch writes to flash memory at regular intervals or when buffer thresholds are reached. This periodic approach converts frequent small write operations into less frequent larger operations, making power consumption more predictable and manageable.
Solution Approach 2:
The memory controller maintains continuous data buffering in volatile memory while managing flash write operations independently. This continuity allows the system to maintain full data storage functionality without interrupting the continuous sensor data flow, while flash operations are scheduled to occur during periods of lower power demand.
Data Source
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AI summary
A memory control system for controlling read and write operations of a nonvolatile memory (40), wherein the memory control system comprises: a memory controller (42), which is adapted to implement a write operation for writing at least one block of data to the memory as a sequence of memory write and validation cycles for part of all of the data, wherein the number of cycles is a function of the amount of successfully written data per cycle and is thus variable in dependence on the success of the data writing; and a power management unit (44), which is adapted to authorize or prevent the memory controller from conducting the write operation at the level of the write cycles thereby to control the timing of power consumption resulting from the cycles of the write operation.