Variable Diameter Through-Silicon Vias Uniform Depth

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Solution Overview

Problem

The challenge in semiconductor processing is forming through-silicon vias with variable diameters while maintaining a constant depth, as non-uniform depth vias lead to over-etching and demand extreme conditions for etch stop materials and etch process selectivity, which is crucial for integrating digital and analog circuitry in a single integrated circuit.

Innovation Solution

A method combining laser ablation and reactive ion etching (RIE) to form through-silicon vias with variable diameters but uniform depth, where laser ablation creates initial vias and RIE completes the etching process, ensuring linear sidewalls and minimizing stress in the silicon substrate, and optimizing etch selectivity to prevent damage to conductive catch pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching methods are used to form through-silicon vias, then via formation is achieved, but non-uniform depth results in over-etching and damage to conductive catch pads

Engineering Contradiction:
Improvevia depth uniformityVSAvoidetch damage to catch pads
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The method forms preliminary via openings through the silicon substrate to a predetermined depth before final completion. This preliminary action establishes uniform depth control by creating initial openings that guide subsequent etching, preventing over-etching and damage to underlying conductive catch pads while enabling accurate depth termination.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The via formation process is divided into multiple sequential etching steps rather than a single etch. The first step creates preliminary openings to a controlled depth, and subsequent steps complete the via formation. This segmentation allows precise depth control at each stage, eliminating the over-etching problem that occurs in single-step etching.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If variable diameter vias are formed, then digital and analog circuitry integration is enabled, but depth uniformity across different diameters becomes difficult to maintain

Engineering Contradiction:
Improvevia diameter variationVSAvoiddepth uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The method applies different etching conditions to different regions of the substrate to create via openings with different diameters while maintaining uniform depth. Each via region receives localized etching treatment appropriate to its required diameter, yet all reach the same predetermined depth, enabling heterogeneous integration of digital and analog circuitry with precise depth control.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of through-silicon vias with accurate diameters and uniform depth, enabling heterogeneous chip integration without damaging catch pads, and ensuring reliable electrical contact and reduced stress in the semiconductor substrate.

Implementation Method 1

A method combining laser ablation and reactive ion etching (RIE) to form through-silicon vias

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

A method combining laser ablation and reactive ion etching (RIE) to form through-silicon vias

Methodology Applied
Scientific EffectReactive ion etching: Plasma

Data Source

PatentUS7803714B2Semiconductor through silicon vias of variable size and method of formation
Publication Date: 2010.09.28 ADEIA SEMICON TECH LLC
  • US7803714B2 patent drawing
  • US7803714B2 patent drawing
  • US7803714B2 patent drawing

AI summary

A through-silicon via structure is formed by providing a substrate having a first conductive catch pad and a second conductive catch pad formed thereon. The substrate is secured to a wafer carrier. A first etch of a first type is performed on the substrate underlying each of the first and second conductive catch pads to form a first partial through-substrate via of a first diameter underlying the first conductive catch pad and a second partial through-substrate via underlying the second conductive catch pad of a second diameter that differs from the first diameter. A second etch of a second type that differs from the first type is performed to continue etching the first partial through-substrate to form equal depth first and second through-substrate vias respectively to the first and second conductive catch pads.