Variable ECC Codeword Packing for NAND Flash Bit Error Rate Targets
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Solution Overview
Problem
Multi-level NAND-type flash memory faces challenges in achieving high bit error rate targets due to limitations in error correction code efficiency, leading to increased hardware complexity and cost when trying to store multiple bits per cell.
Innovation Solution
The implementation of variable error correction codeword packing, where different densities of codewords are programmed across pages in a memory structure to achieve a balance between error mitigation and storage capacity, allowing for five bits per cell while maintaining a target bit error rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bits per cell is increased to support higher storage capacity, then storage density is improved, but the raw bit error rate increases due to voltage level overlap
Solution Approach 1:
The memory block is divided into multiple pages, and within each page, codewords are segmented into different groups (first group and second group). Each group uses a different codeword density packing strategy, allowing the system to handle different error rates in different regions of the same page, thus managing the reliability issue while maintaining high storage density.
Solution Approach 2:
Different regions (pages or page portions) of the memory structure are assigned different codeword densities tailored to their specific error characteristics. Pages or portions with higher error rates use higher codeword densities for better error correction, while those with lower error rates use lower densities for better storage efficiency. This local optimization resolves the contradiction between storage density and reliability.
2Reliability
If the number of parity bits in the ECC codeword is increased to improve error mitigation, then reliability is improved, but the page size and hardware complexity increase
Solution Approach 1:
The codewords are divided into two groups with different densities. The first group uses a lower codeword density (fewer parity bits per host data unit) while the second group uses a higher codeword density. This segmentation allows the system to provide enhanced error mitigation only where needed, rather than uniformly across all data, thus improving reliability without proportionally increasing hardware complexity.
Solution Approach 2:
The system dynamically adjusts the codeword density parameter based on the error characteristics of different pages or page portions. By changing the density parameter (number of codewords per page or per portion), the system optimizes the balance between error mitigation capability and hardware resource utilization, avoiding unnecessary complexity in regions with lower error rates.
3Reliability
If the codeword density is increased to improve error correction, then reliability is improved, but the storage capacity decreases
Solution Approach 1:
The memory structure is segmented into pages or page portions, each with different codeword densities. High-density codeword packing is applied to regions with higher error rates, while low-density packing is used in regions with lower error rates. This ensures that error correction resources are concentrated where most needed, maintaining reliability without unnecessarily reducing overall storage capacity.
Solution Approach 2:
Different codeword densities are applied locally to different pages or page portions based on their specific error characteristics. This local quality approach ensures that storage capacity is optimized by using lower density (higher capacity) in reliable regions while maintaining higher density (better error correction) only in regions where it is truly necessary, thus resolving the contradiction between reliability and storage capacity.
Data Source
AI summary
Systems, apparatuses and methods may provide for technology that programs a first plurality of error correction codewords to a first set of pages in a block of non-volatile memory, wherein the first plurality of error correction codewords are programmed at a first density. The technology may also program a second plurality of error correction codewords to a second set of pages in the block, wherein the second plurality of error correction codewords are programmed at a second density. The first density and the second density are different from one another.