Variable ECC Sector Grouping for Higher Memory Error Correction
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Solution Overview
Problem
Modern memory devices face increasing errors due to smaller device sizes, higher array densities, and increased usage, leading to operational failures and reduced data reliability, with existing error correction codes struggling to keep pace with the rising number of errors and requiring more complex and resource-intensive correction processes.
Innovation Solution
The solution involves disassociating the base data block size for error correction codes (ECC) from user data structures, allowing for variable ECC block sizes and algorithms to be selected based on application needs, such as increased error correction or speed, by combining multiple sectors under a single ECC code, thereby increasing the ECC coverage area and error correction capability without significantly increasing ECC code storage space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional ECC codes are used with fixed block sizes matching user data structures, then the ECC implementation is simple and storage space is minimized, but the error correction capability is insufficient for modern memory devices with higher error rates
Solution Approach 1:
The patent divides the memory array into multiple sectors and groups them into larger ECC coverage areas. Each sector can be independently addressed, but multiple sectors are combined under a single ECC code for enhanced error correction. This segmentation allows the system to maintain fine-grained memory addressing while achieving broader error correction coverage through the grouping of sectors into ECC coverage areas.
Solution Approach 2:
The patent introduces a new organizational dimension by creating ECC coverage areas that span multiple sectors. Instead of a one-to-one mapping between data blocks and ECC codes, the system creates a many-to-one relationship where multiple sectors are covered by a single ECC code. This dimensional change in data organization enables enhanced error correction capability without proportionally increasing ECC code storage.
2Reliability
If larger ECC coverage areas are used to correct more errors, then error correction capability improves, but ECC code storage space and processing complexity increase
Solution Approach 1:
The patent merges multiple sectors into larger ECC coverage areas that are protected by single ECC codes. By combining the error correction functionality across multiple sectors, the system achieves better overall error correction capability while optimizing the use of ECC code storage space. The merging of sectors into ECC coverage areas allows the ECC codes to protect a larger data footprint without requiring a proportional increase in redundancy.
3Productivity
If ECC codes are applied to each individual sector, then error detection is fast and simple, but the overall error correction capability across the memory array is limited
Solution Approach 1:
The patent maintains sector-level granularity for memory addressing and access operations, enabling fast and simple error detection at the sector level. Simultaneously, it groups multiple sectors into larger ECC coverage areas for enhanced error correction. This segmentation approach allows the system to benefit from both fast sector-level operations and improved multi-sector error correction capability.
Solution Approach 2:
The patent creates a two-level ECC structure where sector-level ECC provides fast error detection and correction for individual sectors, while multi-sector ECC coverage areas provide enhanced error correction capability across larger data blocks. This dimensional layering allows the system to maintain fast error detection speeds at the sector level while achieving superior overall error correction capability through the additional multi-sector correction dimension.
Data Source
AI summary
Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by increasing the data area of user data being covered by the ECC code. This averages any possible bit errors over a larger data area and allows a greater number of errors to be corrected by a combining the ECC codes in the coverage area without substantially changing the overall size of ECC codes being stored over a single sector approach. In one embodiment of the present invention, the size of the data block utilized for ECC coverage is variable and can be selected such that differing areas of the memory array or data types can have a differing ECC data coverage sizes. It is also noted that the ECC algorithm, math base or encoding scheme can also be varied between these differing areas of the memory array.


