Variable-Gain ADC Control for Fast Switching Without Sound Degradation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing A/D conversion devices face issues with delayed gain switching in response to input level changes, complex circuit configurations, and frequent gain switching leading to sound degradation, particularly in floating-point A/D conversion systems.

Innovation Solution

An A/D conversion device with a variable-gain amplifier that uses a combination of analog and digital comparators, an FPGA, and a state counter to rapidly adjust gain based on predefined reference levels, reducing the need for complex analog circuits and minimizing frequent gain switching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If gain switching is controlled based on ADC output digital sample, then gain can be adjusted according to signal level, but gain switching is delayed due to ADC processing time

Engineering Contradiction:
Improvegain switching speedVSAvoiddelay in gain switching
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent performs gain control based on the analog signal level before A/D conversion, rather than waiting for the ADC output. By detecting the analog signal level in advance and adjusting the gain accordingly, the system eliminates the delay caused by ADC processing time and achieves immediate gain switching response.

Inventive Principle:
Principle #10Preliminary action

2Speed

If analog circuits are used to compare signal levels and control gain switching, then gain can be adjusted in real-time, but the circuit configuration becomes complex and large

Engineering Contradiction:
Improvereal-time gain adjustmentVSAvoidcircuit configuration complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent replaces complex analog comparison circuits with a simplified analog-to-digital conversion followed by digital comparison. The analog signal is converted to digital by the ADC, and then digital logic circuits compare the digital value with reference levels to control gain switching. This substitution reduces circuit complexity while maintaining real-time response capability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If gain is determined by analog signal voltage during sampling period, then gain can be quickly adjusted, but frequent gain switching occurs when signal is close to zero causing sound degradation

Engineering Contradiction:
Improvegain adjustment speedVSAvoidsound quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent performs gain control based on the analog signal level before A/D conversion, rather than waiting for the ADC output. By detecting the analog signal level in advance and adjusting the gain accordingly, the system eliminates the delay caused by ADC processing time and achieves immediate gain switching response.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a predetermined period threshold for gain increase decisions, requiring the signal to remain within the lower level range for a sustained period before triggering gain increase. This prevents premature or excessive gain switching that would occur with immediate response to transient low-level signals, thereby avoiding sound degradation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11894858B2A/D conversion device and A/D conversion method
Publication Date: 2024.02.06 YAMAHA CORP
  • US11894858B2 patent drawing
  • US11894858B2 patent drawing
  • US11894858B2 patent drawing

AI summary

An amplifier performs analog amplification on a signal I_A with a gain corresponding to a state GS and outputs the amplified signal as a signal M_A. An ADC converts the signal M_A to a digital signal and outputs the digital signal as a signal M_D. Analog comparators and a down-determination unit detect that the signal M_A exceeds a first level, and cause the state GS to transition to a state of gain of the next lower stage. Digital comparators and an up-determination unit detect that the signal M_D has been continuously lower than a second level for a predetermined period, and cause the state GS to transition to a state of gain of the next higher stage. The restoration circuit performs digital amplification on the signal M_D with a gain corresponding to the gain of the amplifier and outputs the amplified signal as a signal O_D.