Variable-Gain Differential Amplifier With Stable FET On-Resistance

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Solution Overview

Problem

Existing variable gain differential amplifiers suffer from linearity issues when only one complimentary input signal and a constant reference signal are provided, leading to asymmetrical circuit operation and deteriorated linearity.

Innovation Solution

A differential amplifier circuit design incorporating a pair of transistors, a field-effect transistor, and a control circuit with a variable current source, where the resistance control voltage is adjusted based on a gain control signal to stabilize the on-resistance of the transistor, ensuring linear output even with single input signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a variable gain differential amplifier uses only one complimentary input signal and a constant reference signal, then the circuit operation becomes asymmetrical, but this asymmetry deteriorates the linearity of the differential output signal

Engineering Contradiction:
Improveinput signal configuration flexibilityVSAvoidlinearity of differential output signal
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent intentionally introduces asymmetry through the control circuit that applies different resistance control voltages to the gate of the FET based on the gain control signal. This controlled asymmetry compensates for the inherent asymmetry caused by single-ended input operation, thereby maintaining linearity in the differential output signal while allowing flexible input signal configuration

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent dynamically changes the resistance control voltage parameter applied to the FET gate in response to the gain control signal. By adjusting this voltage parameter, the circuit maintains stable on-resistance characteristics and ensures linear operation even when operating in single-ended input mode, thus resolving the linearity deterioration issue

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the resistance control voltage is not stabilized, then the on-resistance of the transistor varies, but this variation increases distortion of the differential output signal

Engineering Contradiction:
Improvegain control flexibilityVSAvoiddistortion of differential output signal
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The control circuit implements a feedback mechanism where the gain control signal is used to adjust the resistance control voltage applied to the FET gate. This feedback loop stabilizes the on-resistance of the transistor by dynamically compensating for variations, thereby reducing distortion in the differential output signal while maintaining gain control flexibility

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs dynamic adjustment of the resistance control voltage in response to the gain control signal. This dynamic control mechanism ensures that the on-resistance remains stable during operation, preventing distortion of the differential output signal while allowing the amplifier to adapt to different gain requirements

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11437962B2Differential amplifier circuit having variable gain
Publication Date: 2022.09.06 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US11437962B2 patent drawing
  • US11437962B2 patent drawing
  • US11437962B2 patent drawing

AI summary

A differential amplifier circuit includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generate a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series between the drain and the source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between the gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.