Variable Gain Current Amplifier for Fast LDO Transient Response
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Solution Overview
Problem
Existing LDO voltage regulators struggle to provide fast transient response to large instantaneous changes in load current without increasing power consumption or causing stability issues, and they require large external load bypass capacitors that are costly and impractical for integrated circuits.
Innovation Solution
A variable gain amplifier circuit with a differential input stage and a class AB output stage, including multiple current gain boost paths and a nonlinear gain error amplifier, which allows for fast slewing and settling responses to load current steps without the need for external capacitors, embedded within an integrated circuit chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If large external load bypass capacitors are used to supply fast load current steps, then transient response speed is improved, but device complexity and cost increase due to additional components and packaging requirements
Solution Approach 1:
The invention extracts the capacitance function from external discrete components and integrates it into the operational amplifier's internal compensation capacitor. This eliminates the need for large external load bypass capacitors while maintaining the ability to supply fast load current steps, thereby reducing device complexity and cost without sacrificing transient response speed.
Solution Approach 2:
The invention merges the compensation capacitor and load bypass capacitor functions into a single integrated circuit component. By combining these functions, the patent eliminates the need for separate external capacitors and their associated packaging, bonding pads, and wire bonds, thus reducing overall system complexity while achieving fast transient response.
2Speed
If large external load bypass capacitors are used to supply fast load current steps, then transient response speed is improved, but cost increases due to capacitor components, package pins, and die area
Solution Approach 1:
The invention extracts the capacitance function from external discrete components and integrates it into the operational amplifier's internal compensation capacitor. This eliminates the need for large external load bypass capacitors while maintaining the ability to supply fast load current steps, thereby reducing device complexity and cost without sacrificing transient response speed.
3Speed
If large external load bypass capacitors are used to supply fast load current steps, then transient response speed is improved, but voltage regulation precision deteriorates due to parasitic inductance in wire bonds
Solution Approach 1:
The invention introduces an intermediate solution by integrating the capacitance function directly into the operational amplifier circuitry through the compensation capacitor. This intermediary approach eliminates the need for external wire bonds and their associated parasitic inductances, thereby maintaining fast transient response while preserving voltage regulation precision.
4Adaptability or versatility
If common-mode input voltage can go closer to positive supply rail, then input voltage range is improved, but PMOS input stage performance deteriorates due to gate-to-source voltage constraints
Solution Approach 1:
The invention changes the operating parameters of the PMOS input stage by adjusting bias conditions and voltage levels. This allows the common-mode input voltage to extend closer to the positive supply rail while maintaining adequate gate-to-source voltages for proper PMOS transistor operation, thus expanding the input voltage range without compromising input stage performance.
Data Source
AI summary
Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin−). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.