Semiconductor Package Terminals With Variable Heights for Stress Relief
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Solution Overview
Problem
The semiconductor industry faces challenges with new packaging technologies due to differences in thermal expansion coefficients of various layers, leading to stress and potential delamination or cold joints in semiconductor packages.
Innovation Solution
A method is introduced to form external terminals with varying heights and sizes on a circuit substrate by using a patterned mask layer with controlled opening sizes, allowing for adjusted contact areas and heights of conductive balls to manage stress and improve reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If successive reductions in minimum feature size are implemented to improve integration density, then more electronic components can be integrated into a given area, but the packages occupy less area requiring new packaging technologies that face manufacturing challenges
Solution Approach 1:
The patent segments the external terminals into different height levels by forming them in multiple stages with different solder resist openings. This allows the package to accommodate varying terminal heights while maintaining proper stress distribution and coplanarity, resolving the manufacturing challenges associated with high integration density packaging.
Solution Approach 2:
The patent applies local quality by creating solder resist openings of different sizes at different locations on the package. This enables selective control of external terminal contact areas and heights at specific locations, allowing optimization of stress distribution and electrical connections for high-density integration without compromising overall package reliability.
2Area of stationary object
If new packaging technologies with solder bumps are used to reduce package area, then integration density improves, but differences in thermal expansion coefficients cause stress leading to delamination and cold joints
Solution Approach 1:
The patent changes the physical parameters of the external terminals by forming them with varying heights and contact areas. This parameter variation allows compensation for thermal expansion differences between layers, reducing stress concentration and preventing delamination and cold joints while maintaining compact package dimensions.
Solution Approach 2:
The patent implements beforehand cushioning by designing solder resist openings that control the contact area of each external terminal before the thermal cycling occurs. This pre-configured stress distribution mechanism cushions against the thermal expansion mismatches that would otherwise cause delamination and cold joints during operation.
3Ease of manufacture
If external terminals with uniform heights are formed using conventional methods, then manufacturing is simpler, but stress management is poor leading to reliability issues
Solution Approach 1:
The patent introduces dynamics by transitioning from uniform to non-uniform external terminal heights. This dynamic variation in terminal configuration enables better stress management across the package structure while maintaining a manufacturing process that builds upon conventional techniques, balancing reliability improvement with manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the reliability and electrical performance of semiconductor packages by controlling stress and ensuring coplanarity of terminals, reducing issues like cold joints and bridging.
Implementation Method 1
The plurality of conductive balls is reflowed to form a plurality of external terminals with varying heights connected to the plurality of contact pads of the circuit substrate
Data Source
AI summary
A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. A plurality of conductive balls is placed over a circuit substrate, where each of the conductive balls is placed over a contact area of one of a plurality of contact pads that is accessibly revealed by a patterned mask layer. The conductive balls are reflowed to form a plurality of external terminals with varying heights connected to the contact pads of the circuit substrate, where a first external terminal of the external terminals formed in a first region of the circuit substrate and a second external terminal of the external terminals formed in a second region of the circuit substrate are non-coplanar.


