Variable-Hysteresis Input Buffer Circuit for Low Crowbar Current
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Solution Overview
Problem
Existing input buffer circuits with hysteresis characteristics consume a relatively high amount of power, and they often experience crowbar current issues due to simultaneous conduction of P-channel and N-channel transistors during signal transitions, leading to inefficiencies.
Innovation Solution
A latching input buffer circuit with variable hysteresis is designed, featuring a first stage with a variable resistor coupled between series-coupled transistors, a second stage providing hysteresis, and a latch stage, allowing for adjustable hysteresis based on frequency modes and incorporating a tri-state circuit to minimize crowbar current by ensuring transistors are never on simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hysteresis is provided in input buffer circuit, then noise immunity and signal stability are improved, but power consumption increases
Solution Approach 1:
The patent applies dynamics by making the hysteresis characteristic adjustable rather than fixed. The hysteresis width can be dynamically changed based on operating conditions, allowing the circuit to optimize between noise immunity and power consumption for different signal frequencies. This is achieved through control circuits that adjust the hysteresis parameters in real-time.
Solution Approach 2:
The patent changes the hysteresis parameter dynamically. By adjusting the hysteresis width parameter according to signal frequency and other operating conditions, the circuit can maintain low power consumption while providing sufficient noise immunity when needed. The parameter change allows the system to adapt to different operational requirements.
2Loss of energy
If resistor is added between P-channel and N-channel transistors to reduce crowbar current, then power consumption during transition is reduced, but device complexity increases
Solution Approach 1:
The patent merges the crowbar current reduction function with the hysteresis generation function by using the same resistor element for both purposes. Instead of adding a separate component specifically for reducing crowbar current, the existing hysteresis resistor serves dual functions, thereby reducing overall circuit complexity while still achieving energy loss reduction.
3Reliability
If hysteresis is increased for low frequency signals, then noise immunity is improved, but response time increases
Solution Approach 1:
The patent applies dynamics by making the hysteresis width adjustable based on signal frequency. For low frequency signals, larger hysteresis is applied to improve noise immunity. For high frequency signals, the hysteresis is reduced to maintain fast response time. This dynamic adjustment resolves the contradiction between noise immunity and response time.
Solution Approach 2:
The patent changes the hysteresis parameter according to operating conditions. By varying the hysteresis width parameter based on signal frequency, the circuit optimizes the balance between noise immunity and response time for different operational scenarios.
Data Source
AI summary
An input buffer circuit with hysteresis includes a first stage and a second stage. The first stage includes a resistive device to provide a resistance between two nodes of the first stage. The two nodes are responsive to a signal input. The second stage includes four series-coupled transistors. A first node is coupled to the control electrodes of two of the four transistors and the second node is coupled to the control electrodes of the other two transistors. The second stage includes a signal output. In some examples, a resistance provided by the resistive device is variable and provides the buffer circuit with hysteresis.