Variable Impedance Memory Cell Time-To-Transition Read Circuit

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Solution Overview

Problem

Current memory devices struggle to efficiently determine data values stored in memory cells with variable impedance, as existing methods are limited in accurately reading multiple bits from a single cell and performing mathematical operations effectively.

Innovation Solution

The development of memory devices with a read circuit that performs a time delay determination of a voltage change on a signal node to accurately read data values from memory cells, utilizing a time-to-transition measurement method to correlate the impedance changes with stored data values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional reading methods are used for memory cells with variable impedance, then data can be read, but the reading process is slow and inefficient due to the need for precise voltage changes and time delays

Engineering Contradiction:
Improvedata retrieval speedVSAvoidtime delay for voltage change
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent changes the measurement parameter from voltage level to time delay. Instead of measuring voltage at a fixed time point, the system measures the time it takes for the voltage to change from one level to another. This time delay parameter directly reflects the variable impedance of the memory cell, enabling faster and more efficient data retrieval without requiring multiple voltage adjustment steps.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If multiple bits are stored in a single memory cell using variable impedance, then storage density increases, but the complexity of reading and determining data values increases

Engineering Contradiction:
Improvenumber of bits per memory cellVSAvoidcomplexity of read circuit
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent introduces a time delay measurement mechanism as an intermediary between the memory cell and the read circuit. This intermediary translates the complex variable impedance characteristics (which encode multiple bits) into a simple time delay signal that can be easily measured and interpreted. The time delay acts as a mediator that simplifies the interface between the high-density storage mechanism and the reading apparatus.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If precise voltage changes are required to determine data values, then measurement accuracy is maintained, but the reading process becomes slower and more complex

Engineering Contradiction:
Improveaccuracy of data value determinationVSAvoiddata retrieval speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent replaces the mechanical/voltage-based measurement system with a time-based measurement system. Instead of using complex voltage adjustment mechanisms and precise voltage level detection, the system uses a simple time delay measurement approach. This substitution maintains measurement precision because the time delay is directly proportional to the voltage change rate, which in turn reflects the stored data value, while dramatically improving retrieval speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for precise determination of data values in memory cells with variable impedance, enabling the storage of multiple bits in a single cell and improved mathematical operations, enhancing data storage and processing efficiency.

Implementation Method 1

each memory cell having a variable impedance that varies in accordance with a respective data value stored therein

Methodology Applied
Scientific EffectVariable impedance: Electrical Resistance

Implementation Method 2

a read circuit configured to read the data value stored within a selected memory cell based upon a variable time delay determination of a signal node voltage change corresponding to the variable impedance of the selected memory cell

Methodology Applied
Scientific EffectTime delay measurement:

Data Source

PatentUS20220293165A1Memory Device Having Variable Impedance Memory Cells and Time-To-Transition Sensing of Data Stored Therein
Publication Date: 2022.09.15 R&D 3 LLC
  • US20220293165A1 patent drawing
  • US20220293165A1 patent drawing
  • US20220293165A1 patent drawing

AI summary

The present disclosure relates to circuits, systems, and methods of operation for a memory device. In an example, a memory device includes a plurality of memory cells, each memory cell having a variable impedance that varies in accordance with a respective data value stored therein; and a read circuit configured to read the data value stored within a selected memory cell based upon a variable time delay determination of a signal node voltage change corresponding to the variable impedance of the selected memory cell.