Variable Initial Programming Pulse for Non-Volatile Memory

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Solution Overview

Problem

Existing non-volatile memory devices face challenges in programming speed and risk of over-programming due to charge trapping in the insulation between the floating gate and channel region, leading to inconsistent program voltage requirements for fresh and heavily used devices.

Innovation Solution

The method involves performing multiple programming processes with adjustable programming pulses, where the pulse increment is decreased once an intermediate condition is reached, allowing for dynamic adjustment of the starting program voltage to optimize programming speed while preventing over-programming across different usage stages of the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a high magnitude program voltage is used, then programming speed is improved, but over-programming occurs in heavily used devices

Engineering Contradiction:
Improveprogramming speedVSAvoidover-programming risk
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic adjustment of the initial program voltage magnitude based on the usage history of the memory device. The system transitions from a static voltage approach to a dynamic one where the initial voltage is modified according to the number of programming cycles performed, allowing the programming parameters to adapt to the device's aging state and prevent over-programming while maintaining speed

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical parameter (initial program voltage magnitude) based on the device's usage state. By monitoring the number of programming cycles and adjusting the voltage magnitude accordingly, the system optimizes the programming process for both speed and reliability at different stages of device usage

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a low magnitude program voltage is used, then over-programming is prevented, but programming speed decreases

Engineering Contradiction:
Improveover-programming preventionVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically selects the initial program voltage magnitude based on the device's usage history. For new devices with minimal programming cycles, a higher initial voltage is used to achieve fast programming. As the device accumulates programming cycles, the initial voltage is reduced to prevent over-programming, thus maintaining reliability while preserving speed where possible

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent performs preliminary assessment of the device's usage state (number of programming cycles) before initiating the programming operation. Based on this preliminary information, the system pre-adjusts the initial program voltage magnitude to the appropriate level, ensuring optimal programming speed from the start while preventing over-programming risks

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the same program signal is used for fresh and heavily used devices, then device complexity is reduced, but programming performance becomes inconsistent

Engineering Contradiction:
Improveprogramming signal uniformityVSAvoidprogramming performance consistency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent modifies the programming signal parameters (initial voltage magnitude) based on the device's usage state. The system maintains a uniform programming signal structure while dynamically adjusting the initial voltage magnitude parameter, achieving consistent programming performance across different device ages without significantly increasing overall system complexity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances programming speed while reducing the risk of over-programming, ensuring consistent performance across the lifespan of the memory device by adapting to the changing electrical characteristics of the storage elements.

Implementation Method 1

Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised

Methodology Applied
Scientific EffectTunneling:

Implementation Method 2

charge becomes trapped in the insulation between the floating gate and the channel region. This trapping of charge shifts the threshold voltage to a higher level

Methodology Applied
Scientific EffectCharge trapping: Dielectric

Data Source

PatentUS8422302B2Programming non-volatile memory with variable initial programming pulse
Publication Date: 2013.04.16 PALISADE TECH LLP
  • US8422302B2 patent drawing
  • US8422302B2 patent drawing
  • US8422302B2 patent drawing

AI summary

Multiple programming processes are performed for a plurality of non-volatile storage elements. Each of the programming process operates to program at least a subset of the non-volatile storage elements to a set of target conditions using programming pulses. For at least a subset of the programming processes, a programming pulse associated with achieving an intermediate result for a respective programming process is identified, a pulse increment between programming pulses is decreased for the respective programming process while continuing the respective programming process to program non-volatile storage elements to the respective one or more targets and the identified programming pulse is used to adjust a starting programming voltage for a subsequent programming process.