Variable Input Emulation Group for Hardware Emulator Efficiency

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Solution Overview

Problem

Current hardware emulators are limited in computational efficiency as they do not effectively evaluate a variable amount of data in a single emulation step, leading to inefficiencies due to unused input data from multiple read ports.

Innovation Solution

A hardware emulator system utilizing an emulation pair with two processors and complementary multiplexers, allowing for the evaluation of a variable number of input signals by selecting and processing data from a data array, enabling additional data input signal evaluation during an emulation step.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a processor evaluates all input data from multiple read ports in a single emulation step, then computational efficiency is improved, but device complexity increases due to the need for additional data selection mechanisms

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidemulation circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic configurability where the number of active read ports can be changed at runtime based on the emulation requirements. The emulation pair can dynamically select between evaluating 2, 4, or 6 input signals by configuring the data input selector to connect different combinations of read ports to the processors, allowing the system to adapt its data processing capacity to match the actual computational needs of each logic level being evaluated.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The emulation pair architecture provides multi-functionality by enabling the same hardware configuration to evaluate variable numbers of input signals (2, 4, or 6) through the data input selector. This universal design allows a single emulation pair to handle multiple different logic level requirements without requiring separate dedicated circuits for each configuration, thereby improving computational efficiency while controlling device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a fixed number of input signals are evaluated per processor, then device complexity is reduced, but adaptability decreases when variable amounts of data need to be processed

Engineering Contradiction:
Improvedata processing flexibilityVSAvoidemulation circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system achieves dynamic adaptability through the data input selector which can be configured to connect different numbers of read ports (2, 4, or 6) to the emulation pair. This dynamic configuration capability allows the emulation circuit to adapt to variable data processing requirements without permanently increasing device complexity, as the same hardware can be reconfigured for different emulation scenarios.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the data input selection function into a dedicated data input selector component that independently controls which read ports are connected to the processors. This segmentation allows flexible configuration of the number of active input signals (2, 4, or 6) without affecting the core processor architecture, thereby improving adaptability while keeping the overall device complexity manageable through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7904288B1Hardware emulator having a variable input emulation group
Publication Date: 2011.03.08 CADENCE DESIGN SYST INC
  • US7904288B1 patent drawing
  • US7904288B1 patent drawing
  • US7904288B1 patent drawing

AI summary

A hardware emulator having a variable input emulation group is described. Each emulation group comprises two or more processors, where one of the processors (a first processor) is coupled to a data input selector and another one of the processors (a second processor) processes a first amount of data received from a data array. The data input selector receives the first amount of data and a second amount of data from the data array, and selects a third amount of data from among the first and second amounts of data. The third amount of data is provided to the first processor for evaluation.