Variable Interleave Sizes for Hard Disk Drive Zones

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Solution Overview

Problem

Existing hard disk drive interleave schemes struggle to balance error rate performance and areal density across different radial areas of a disk, as the interleave size must be smaller near the center to maintain acceptable latency but can be larger at the outer areas, where radial velocity is higher.

Innovation Solution

Implementing a dynamic interleave scheme where the interleave size varies based on the location on the disk, with smaller sizes near the inner radius and larger sizes near the outer radius, and using a common slice size for multiple interleave sizes to optimize data sparsity and error rate performance across different zones.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a uniform interleave size is used across the entire disk, then the inner radius area achieves acceptable latency, but the outer radius area cannot achieve optimal areal density

Engineering Contradiction:
ImprovelatencyVSAvoidareal density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by implementing different interleave sizes for different radial zones of the disk. The disk surface is divided into multiple zones (e.g., inner zone, middle zone, outer zone), each with its own optimized interleave size. Inner zones use smaller interleave sizes to maintain low latency, while outer zones use larger interleave sizes to maximize areal density and error correction capability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the disk surface into multiple radial zones, each independently configured with appropriate interleave parameters. This segmentation allows the system to optimize for different performance requirements in different physical locations on the disk, rather than using a single uniform interleave size for the entire disk.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a larger interleave size is used to improve error correction, then areal density increases, but latency increases in inner radius areas

Engineering Contradiction:
Improveerror correctionVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements local quality by assigning different interleave sizes to different radial zones. Outer zones, which have higher linear velocity and tolerate higher latency, use larger interleave sizes for improved error correction. Inner zones, which have lower linear velocity and require low latency, use smaller interleave sizes, thus avoiding the latency penalty while still achieving acceptable error correction in those regions.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If different interleave sizes are used for different zones, then areal density is optimized, but device complexity increases

Engineering Contradiction:
Improveareal densityVSAvoidinterleave scheme complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies universality by using a common slice size across all zones that works effectively with multiple different interleave sizes. This common slice size serves as a universal parameter that simplifies the implementation of variable interleave schemes, reducing the complexity that would otherwise arise from having to manage multiple different slice sizes along with multiple interleave sizes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12176001B1Variable data interleave sizes on hard drives
Publication Date: 2024.12.24 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US12176001B1 patent drawing
  • US12176001B1 patent drawing
  • US12176001B1 patent drawing

AI summary

Improved tools and techniques for configuring a write head of a hard disk drive and/or for writing data to a hard disk drive. The write surface of a disk in the hard disk drive can be divided into multiple logical zones, with different interleave sizes for each zone. This scheme can meet latency requirements for regions closer to the center of the write surface while providing for better error rate performance in regions further away from the center of the write surface.