Variable-Load Ring Oscillator PLL for Fast Capture and Stable Lock
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Solution Overview
Problem
Phase-locked loops often experience long capture times and failure to lock due to initial frequency and phase discrepancies between feedback and reference signals, especially when the low-pass filter has low bandwidth, which is undesirable in applications like frequency-hopping radios.
Innovation Solution
A phase-locked loop system utilizing a voltage-controlled variable-load ring oscillator with multiple load selection transistors and capacitors, where the load configuration is set to match the period of the divided reference signal, and the control voltage is clamped to a reference voltage to rapidly lock the loop, and additional mechanisms like the Fth-bus mechanism adjust the load to maintain lock across varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the low-pass filter has low bandwidth to reduce phase noise, then phase noise is reduced, but the loop may fail to lock when initial frequency discrepancy is large
Solution Approach 1:
The patent applies preliminary action by initializing the VCO control voltage to a pre-determined value before the PLL locking process begins. This initial voltage is calculated based on the expected locked state, allowing the VCO to start at a frequency close to the target frequency. This preliminary positioning enables the low-pass filter to maintain low bandwidth (reducing phase noise) while still achieving successful lock, as the frequency discrepancy to be corrected is minimized from the start.
2Adaptability or versatility
If the initial frequency and phase are far apart, then the PLL can operate over a wide range, but the capture time becomes long
Solution Approach 1:
The patent uses preliminary action to pre-calculate and set the initial VCO control voltage based on the desired locked frequency and the current divider ratios. This allows the VCO to start oscillating at a frequency much closer to the target frequency, dramatically reducing the capture time even when the PLL must support wide frequency ranges. The system maintains adaptability by allowing the initial voltage calculation to accommodate different frequency configurations.
Solution Approach 2:
The patent implements dynamics by making the VCO load variable and controllable. By dynamically adjusting the VCO load during the initialization and locking process, the system can optimize the capture speed for different frequency ranges. The variable load allows the VCO frequency to be quickly adjusted during capture while maintaining stability during locked operation, thus reducing capture time without sacrificing frequency range adaptability.
3Device complexity
If the VCO control voltage is not initialized, then the circuit is simpler, but the capture time increases and locking may fail
Solution Approach 1:
The patent applies preliminary action by implementing an initialization mechanism that pre-calculates and sets the VCO control voltage before the PLL locking process begins. This initial voltage is determined based on the expected locked state, the VCO characteristics, and the divider ratios. By performing this preliminary setup, the system achieves fast capture and reliable locking without requiring complex continuous control mechanisms, thus balancing device complexity with performance improvement.
4Object-generated harmful factors
If the VCO gain is low to reduce phase noise, then phase noise is reduced, but the loop may fail to lock when frequency discrepancy is large
Solution Approach 1:
The patent uses preliminary action to initialize the VCO control voltage to a value that anticipates the locked state. This allows the VCO to start at a frequency close to the target frequency, enabling the use of low VCO gain (which reduces phase noise) while still achieving successful locking. The preliminary voltage setting compensates for the limited frequency correction capability of low-gain VCOs by reducing the initial frequency discrepancy.
Solution Approach 2:
The patent implements dynamics by making the VCO load variable and adjustable. By dynamically controlling the VCO load during initialization and locking, the system can effectively increase the frequency correction capability temporarily during the capture phase, then transition to low-gain operation for reduced phase noise during locked state. This dynamic adjustment allows the system to achieve both fast locking and low phase noise.
Data Source
AI summary
A phase locked loop system has a voltage-controlled variable-load ring oscillator (VLCO) that operates in a frequency band determined by a selected load on each stage of the ring oscillator. Each stage of the VLCO has multiple load selection transistors, each coupled to a load capacitor. Apparatus is provided for driving the load selection transistors according to a load configuration; and apparatus is provided for determining an operating load configuration such that a period of a divided reference signal approximately matches a period of a divided VLCO signal with the VLCO control voltage input clamped to a reference voltage. Once the load configuration is set, the loop is allowed to lock. In a particular embodiment, devices are provided for slowly tweaking the VLCO load to help keep the VLCO operating near an optimum control voltage despite drift of circuit parameters with temperature or time.