Variable-Resistance Memory Layout With Central Isolation Protrusions

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Solution Overview

Problem

Current variable resistance memory devices face challenges in achieving increased operating speed and integration, particularly in magnetoresistive random access memory (MRAM) due to limitations in design and structure that affect current transfer characteristics.

Innovation Solution

The proposed variable resistance memory device incorporates a substrate with wiring contacts, isolation insulating layers featuring protrusions defined by recesses, and variable resistance pattern structures arranged in a specific geometric configuration, including protrusions at the center of squares formed by four adjacent structures, to enhance spacing and connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If variable resistance memory devices use conventional structures, then manufacturing is simpler, but operating speed and integration are limited

Engineering Contradiction:

Improveoperating speedVSAvoidstructure complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The memory device structure is segmented into distinct functional regions: a first region containing first variable resistance memory cells with first wiring contacts, and a second region containing second variable resistance memory cells with second wiring contacts. This segmentation allows independent optimization of each region's current transfer characteristics, improving overall operating speed while maintaining manageable structural complexity through modular design.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimension to the wiring contact arrangement by placing first wiring contacts and second wiring contacts at different vertical levels. This three-dimensional arrangement enables increased integration density and improved current transfer paths without proportionally increasing planar footprint, thereby enhancing operating speed while controlling structural complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If memory cells are arranged closer together, then integration increases, but interference between adjacent cells increases

Engineering Contradiction:

ImproveintegrationVSAvoidinterference between adjacent cells

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

Shared wiring contacts serve as intermediary structures between adjacent variable resistance memory cells. These shared contacts are strategically positioned to provide electrical connection to multiple cells while maintaining adequate spacing and isolation, enabling high integration density without causing harmful interference between neighboring cells. The intermediary contacts act as buffer zones that manage electrical fields and current paths.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different spatial arrangements and isolation techniques to different regions of the memory device. In regions where cells are closely spaced, enhanced isolation structures and optimized contact geometries are used to prevent interference. This local optimization allows high integration in critical areas while maintaining signal integrity, resolving the contradiction between integration and interference.

Inventive Principle:

Principle #3Local quality

3Ease of manufacture

If wiring contacts are arranged in a regular grid pattern, then manufacturing is easier, but current transfer characteristics are suboptimal

Engineering Contradiction:

Improvewiring contact arrangementVSAvoidcurrent transfer characteristics

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent employs asymmetric wiring contact arrangements where first wiring contacts and second wiring contacts have different positions, orientations, or geometries optimized for their specific functional requirements. This asymmetric design enables superior current transfer characteristics by tailoring each contact's geometry to its specific electrical and mechanical demands, while remaining compatible with standard manufacturing processes through systematic patterning.

Inventive Principle:

Principle #4Asymmetry

Data Source

PatentUS20250329353A1Variable resistance memory device including protrusions and recesses

Publication Date: 2025.10.23 SAMSUNG ELECTRONICS CO LTD

AI summary

A variable resistance memory device includes: a substrate; a plurality of wiring contacts arranged on the substrate; an isolation insulating layer disposed on the plurality of wiring contacts; and a plurality of variable resistance pattern structures arranged on the isolation insulating layer, wherein the plurality of variable resistance pattern structures constitute a plurality of memory cells, and are spaced apart from one another in a horizontal direction, wherein the isolation insulating layer includes a protrusion that is defined by an isolation recess, and wherein four adjacent variable resistance pattern structures among the plurality of variable resistance pattern structures are respectively arranged at four vertices of a square, and the protrusion is arranged in a central region of the square.