Variable-Period Digital PWM for Higher Resolution at Lower Clock Speed

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Solution Overview

Problem

Existing digital pulse width modulation (PWM) circuits face limitations in resolution due to fixed clock speeds, leading to significant quantization errors and noise, especially when trying to achieve high resolution in audio signal processing for loads like speakers and headphones.

Innovation Solution

The solution involves allowing both pulse width and pulse period to vary, using a 1-dimensional online search algorithm to optimize pulse value approximation, and implementing error distribution and squelching mechanisms to reduce quantization errors and noise, while ensuring a fixed delay and configurable carrier frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a fixed clock speed is used to generate the triangular waveform, then the circuit operation is simple and stable, but the resolution is limited and quantization errors increase

Engineering Contradiction:
ImproveresolutionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the pulse period variable rather than fixed. The pulse period is adjusted based on the input signal amplitude and desired resolution, allowing the PWM circuit to adapt its timing characteristics dynamically. This resolves the contradiction by enabling high resolution when needed while maintaining simpler operation for lower resolution requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of pulse period from a fixed value to a variable parameter that can be adjusted according to signal requirements. By varying the pulse period parameter, the system achieves higher effective resolution without requiring proportionally higher clock speeds, thus resolving the contradiction between precision and complexity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the clock speed is increased to reduce quantization errors, then the resolution improves, but the power consumption increases and the circuit becomes less practical

Engineering Contradiction:
ImproveresolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent uses dynamic pulse period adjustment to achieve high resolution only when and where needed in the signal spectrum, rather than maintaining a uniformly high clock speed across all operating conditions. This dynamic adaptation reduces average power consumption while maintaining peak resolution performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

By changing the pulse period parameter dynamically based on signal characteristics, the system achieves high effective resolution without requiring a uniformly high clock speed, thereby reducing overall power consumption while maintaining the ability to achieve high resolution when required.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a fixed pulse period is used, then the carrier frequency is stable, but the quantization error distribution is poor and noise increases

Engineering Contradiction:
Improvenoise performanceVSAvoidcarrier frequency stability
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies dynamics by making the pulse period variable rather than fixed. The pulse period is adjusted based on the input signal amplitude and desired resolution, allowing the PWM circuit to adapt its timing characteristics dynamically. This resolves the contradiction by enabling high resolution when needed while maintaining simpler operation for lower resolution requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of pulse period from a fixed value to a variable parameter that can be adjusted according to signal requirements, allowing the system to optimize noise performance by distributing quantization errors more effectively across different frequency components.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7764734B2Digital pulse width modulation with variable period and error distribution
Publication Date: 2010.07.27 WINBOND ELECTRONICS CORP
  • US7764734B2 patent drawing
  • US7764734B2 patent drawing
  • US7764734B2 patent drawing

AI summary

Digital pulse width modulation with variable period and error distribution that improves the tradeoff between resolution and clock speed in pulse width modulation circuits so that a higher resolution can be achieved with a lower clock speed. A preferred method includes, for a signal sample S and each value of P in a range Pmin to Pmax of pulse periods P, determining a pulse width V=round(P*S), where round(P*S) is the closest integer value of P*S, and the magnitude of the error |E|=|S−V/P|, for the value of V (Vopt) and P (Popt) associated with the lowest value of the magnitude of the error |E|, providing an output pulse of a pulse width Vopt during the pulse period Popt, and successively repeating a) and b). Other aspects of the invention may include error distribution, error squelching to prevent idle-tone, idle-noise artifacts, 2-samples-per-pulse and non-uniform sampling and pulsing. Other features are disclosed.