Variable-Height Pillar Bumps for Stress and Bridging Control

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Solution Overview

Problem

Pillar bumps in integrated devices face challenges such as solder bridging and differential thermal expansion, which can lead to failures due to their rigid nature and high chip-package interaction (CPI) stresses.

Innovation Solution

The use of pillar bumps with varying pillar and solder cap heights, where the total height remains consistent, allows for selective positioning to mitigate solder bridging and CPI stresses. Taller solder caps are placed at high-stress locations, while shorter solder caps are used in tightly packed configurations to reduce bridging risks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pillar bumps are used for flip chip connections, then I/O connection density is increased, but solder bridging and CPI stresses lead to higher failure rates

Engineering Contradiction:
ImproveI/O connection densityVSAvoidfailure rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by varying the height of pillar bumps based on their location. First pillar bumps at first locations have a first height, while second pillar bumps at second locations have a second height different from the first. This allows optimization of each location's pillar bump height to balance connection density and reliability requirements locally.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the height parameter of pillar bumps to resolve the contradiction. By adjusting pillar bump heights differently at different locations, the patent optimizes both I/O connection density and reliability, preventing solder bridging while managing CPI stresses through parameter variation.

Inventive Principle:
Principle #35Parameter changes

2Strength

If pillar bumps are made rigid for structural support, then mechanical strength is improved, but CPI stresses transfer more to underlying components causing failures

Engineering Contradiction:
Improvemechanical strengthVSAvoidCPI stress transfer
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by positioning pillar bumps of different heights at different locations. First pillar bumps with first height are placed at first locations, while second pillar bumps with second height are placed at second locations. This local differentiation allows some pillar bumps to provide structural support while others mitigate stress transfer to underlying components.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the height parameter of pillar bumps to control their mechanical properties. By varying pillar bump heights, the patent adjusts the rigidity and stress distribution characteristics, allowing optimization of both mechanical strength and CPI stress management through parameter variation.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If solder cap height is increased for stress mitigation, then CPI stress absorption is improved, but solder bridging risk increases in tightly spaced configurations

Engineering Contradiction:
ImproveCPI stress absorptionVSAvoidsolder bridging risk
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by assigning different solder cap heights to different locations. First solder caps with first heights are placed at first locations, while second solder caps with second heights are placed at second locations. This allows locations requiring stress absorption to have taller solder caps, while tightly spaced locations have shorter solder caps to prevent bridging.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the height parameter of solder caps to resolve the contradiction between stress absorption and bridging prevention. By varying solder cap heights at different locations, the patent optimizes both CPI stress mitigation and solder bridging prevention through localized parameter adjustment.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the risk of solder bridging and mechanical stress-related failures in integrated devices, enabling the use of finer pitch pillar bumps and maintaining device reliability.

Implementation Method 1

taller solder caps are placed at high-stress locations... effectively reduces the risk of solder bridging and mechanical stress-related failures

Methodology Applied
Scientific EffectStress absorption:

Implementation Method 2

This heating can introduce stresses due to differential expansion of various materials of the die and the substrate

Methodology Applied
Scientific EffectDifferential thermal expansion: Thermal Expansion

Data Source

PatentUS20250183211A1Stress mitigating pillar bumps
Publication Date: 2025.06.05 QUALCOMM INC
  • US20250183211A1 patent drawing
  • US20250183211A1 patent drawing
  • US20250183211A1 patent drawing

AI summary

A die includes a plurality of pillar bumps configured to electrically connect the die to a substrate. The plurality of pillar bumps includes at least one first pillar bump having a first total pillar bump height. The at least one first pillar bump includes a first pillar having a first pillar height and a first solder cap having a first solder cap height. The plurality of pillar bumps includes at least one second pillar bump having a second pillar height substantially equal to the first total pillar bump height. The at least one second pillar bump includes a second pillar having a second pillar height and a second solder cap having a second solder cap height. The second pillar height is greater than the first pillar height, and the second solder cap height is less than the first solder cap height.