Variable Reference Signal MRAM Read Circuit
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Solution Overview
Problem
Nonvolatile semiconductor memory devices face challenges in maintaining data integrity due to variations in reference signals used for reading data, leading to potential read errors, especially in magnetic random access memory (MRAM) where resistance states can be non-uniform, affecting the precision of data sensing.
Innovation Solution
A nonvolatile memory device with a read/write circuit that generates a variable reference signal with multiple levels to accurately identify logic states in memory cells, utilizing a reference cell array with distinct resistance values for each logic state and an error correction mechanism to adjust the reference signal based on sensed conditions, thereby enhancing data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed reference signal is used for reading data, then the read operation is simple, but read errors occur due to variations in reference signal levels
Solution Approach 1:
The reference signal level is made dynamic rather than fixed. The read/write circuit generates a reference signal whose level can be adjusted based on sensed read conditions. When read errors are detected, the system changes the reference signal level to a different value to improve reading accuracy, thus resolving the contradiction between reliability and complexity.
Solution Approach 2:
A feedback mechanism is implemented where the read/write circuit senses read conditions and detects errors in output data. Based on this feedback, the system determines whether to change the reference signal level. This closed-loop feedback approach ensures data integrity while managing the complexity through intelligent control.
2Measurement precision
If multiple reference signal levels are generated to improve reading accuracy, then data integrity increases, but the circuit complexity increases
Solution Approach 1:
The system changes the parameter (reference signal level) to improve measurement precision. By generating reference signals at different levels and selecting appropriate levels based on read conditions, the system achieves more accurate logic state identification. This parameter variation approach resolves the contradiction by making the reference signal adaptable rather than static.
Solution Approach 2:
The reference signal generation is segmented into multiple discrete levels rather than using a single continuous range. The read/write circuit is configured to generate reference signals at specific, distinct levels, which simplifies the control logic while improving precision. This segmentation allows the system to achieve high measurement accuracy without excessive circuit complexity.
3Measurement precision
If reference cells with distinct resistance values are used for each logic state, then sensing precision improves, but manufacturing precision requirements increase
Solution Approach 1:
Different reference cells are designed with distinct resistance values tailored to specific logic states. Each reference cell is optimized for its particular function, allowing precise sensing of different logic states. This local quality approach enables high measurement precision while managing manufacturing complexity through specialized design of individual reference cells rather than requiring all cells to meet identical stringent specifications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively mitigates read errors by providing a precise reference signal that adapts to varying conditions, ensuring high data integrity and accuracy in identifying logic states within memory cells, even under process variations and noise.
Implementation Method 1
a nonvolatile memory device with a read/write circuit that generates a variable reference signal with multiple levels to accurately identify logic states in memory cells, utilizing a reference cell array with distinct resistance values for each logic state
Data Source
AI summary
A nonvolatile random access memory device includes a plurality of memory cells configured to store data therein, a plurality of reference cells separate from the memory cells, the reference cells each configured to output a corresponding reference cell signal, and a read/write circuit. The read/write circuit is configured to generate from the reference cell signals a reference signal which is variable to have a plurality of different reference levels. The read/write circuit is further configured to identify, in response to the reference signal, a logic state among a first logic state and a second logic state for each of one or more selected memory cells, and to output read data corresponding to the identified logic state.