Variable Resistance Layer Width Tapering for Memory Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in optimizing the operation characteristics of variable resistance elements due to differences in crystal growth directions and temperature increase directions, leading to variations in set operation speeds and resistance changes.
Innovation Solution
The semiconductor memory device incorporates a configuration with first and second variable resistance elements, each with a phase change material layer, where the crystal growth directions coincide with current flow directions, and the temperature increase directions are aligned, while the second variable resistance layer's width decreases from bottom to top to enhance crystallization speed and reduce resistance variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the width of the second variable resistance layer is reduced from bottom to top, then the crystallization speed is enhanced and resistance variations are reduced, but the manufacturing complexity increases
Solution Approach 1:
The second variable resistance layer is designed with non-uniform width, where the width varies from bottom to top. This local variation in geometric property allows different regions of the same layer to have different resistance characteristics, thereby reducing overall resistance variations and enhancing crystallization speed without requiring different materials or complex multi-layer structures.
2Speed
If the crystal growth direction is aligned with current flow direction, then the set operation speed is improved, but the temperature control becomes more challenging
Solution Approach 1:
The patent aligns the crystal growth direction with the current flow direction in the variable resistance layer. This parameter alignment ensures that during set operation, the crystallization process occurs along the path of current flow, thereby improving set operation speed. The temperature control challenge is managed through the inherent thermal properties of the phase change material and the controlled current pulse duration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the operational characteristics of the memory device by reducing differences in set operation speeds and resistance changes between the first and second variable resistance elements, resulting in more uniform and efficient data storage.
Implementation Method 1
The first and second variable resistance layers may include a phase change material
Implementation Method 2
crystal growth directions of the first and second variable resistance layers may coincide with the directions of currents flowing through the first and second variable resistance elements
Implementation Method 3
during the set operation, the direction of a current flowing through the first variable resistance element may coincide with a temperature increase direction in the first variable resistance element
Data Source
AI summary
An electronic device includes a semiconductor memory. The semiconductor memory comprises a first variable resistance element coupled between a first wiring and a second wiring, the first variable resistance element including a first variable resistance layer having a first width at a first distance from the first wiring; and a second variable resistance element coupled between the second wiring and a third wiring, the second variable resistance element including a second variable resistance layer having a second width at the first distance from the second wiring. The first width is greater than the second width.