Variable Resistance for Uniform Current in Nonvolatile Memory Arrays
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Solution Overview
Problem
Non-uniform series resistance in memory cells due to varying lengths of word and bit lines in cross-point MRAM structures leads to non-uniform data write operations, causing errors that conventional error correction codes struggle to correct effectively.
Innovation Solution
Implementing a variable resistor in series with each memory cell, adjustable based on the location and other factors to equalize total series resistance across all cells, compensating for variations in word and bit line lengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction codes are used to correct errors caused by non-uniform currents, then data integrity can be maintained, but resource consumption and correction time increase significantly
Solution Approach 1:
The patent applies preliminary action by pre-configuring variable resistors with specific resistance values before memory write operations. These resistors are set based on the location of memory cells to compensate for non-uniform series resistance in advance, ensuring uniform current distribution during subsequent write operations without requiring post-operation error correction
Solution Approach 2:
The patent changes the resistance parameter of variable resistors connected in series with memory cells. By adjusting these resistance values based on cell location, the system compensates for non-uniform series resistance from word and bit lines, achieving uniform current distribution across all memory cells during write operations
2Reliability
If variable resistors are added to each memory cell to equalize series resistance, then current uniformity improves, but device complexity increases
Solution Approach 1:
The patent applies local quality by assigning different resistance values to variable resistors based on their specific location within the memory array. Memory cells at different positions (with different series resistance from word and bit lines) are equipped with variable resistors tuned to their local characteristics, achieving uniform current distribution through localized compensation rather than uniform treatment
Solution Approach 2:
The variable resistors serve as intermediary elements between the control circuit and memory cells. These resistors mediate the current flow by providing adjustable resistance that compensates for the non-uniform series resistance of word and bit lines, enabling uniform current distribution without requiring direct modification of the memory cell structure
3Device complexity
If memory cells are accessed with non-uniform series resistance, then device simplicity is maintained, but data write operations become non-uniform causing errors
Solution Approach 1:
The system performs preliminary configuration of variable resistors before write operations, setting each resistor's value based on the memory cell's location. This pre-compensation ensures that when write operations occur, all memory cells receive uniform current despite having different series resistance from word and bit lines, preventing write errors without complicating the fundamental memory structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces errors by maintaining consistent memory access conditions, enhancing data integrity and reducing the reliance on resource-intensive error correction codes.
Implementation Method 1
Implementing a variable resistor in series with each memory cell, adjustable based on the location and other factors to equalize total series resistance across all cells, compensating for variations in word and bit line lengths
Data Source
AI summary
An apparatus includes one or more control circuit configured to connect to a nonvolatile memory cell structure that includes nonvolatile memory cells each having a programmable resistive element. The one or more control circuit is configured to receive an address that corresponds to a location in the nonvolatile memory cell structure and set a variable resistor according to the location. The variable resistor is connected in series with a selected nonvolatile memory cell that is located at the location. The one or more control circuit is further configured to drive a memory access current through the selected nonvolatile memory cell and the variable resistor in series.