Variable Resistance Memory With Asymmetric Path Resistance
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Solution Overview
Problem
The existing semiconductor memory devices face challenges in maintaining optimal operating characteristics due to variations in resistance paths and current flow, leading to potential failures during write operations, especially when variable resistance elements are closer to switching elements, resulting in uneven resistance states and potential element failure.
Innovation Solution
The implementation includes a semiconductor memory device with a configuration of first and second variable resistance elements and switching elements, where the distance between the switching elements and variable resistance elements varies, and additional resistance components are added to paths closer to the switching elements to balance resistance, ensuring consistent current flow and reducing the risk of element failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If variable resistance elements are placed closer to switching elements to reduce device area, then area is reduced, but resistance path becomes unbalanced causing operating characteristic degradation
Solution Approach 1:
The patent applies local quality by introducing compensation resistance components specifically in paths where variable resistance elements are closer to switching elements. This creates non-uniform resistance compensation across different memory cell paths, balancing the overall resistance without requiring uniform structural modifications throughout the entire memory array, thus maintaining compact area while improving operating characteristics.
Solution Approach 2:
The patent employs asymmetry by deliberately creating asymmetric resistance paths through selective placement of compensation resistance components. Instead of making all paths identical, the design accepts and compensates for asymmetric resistance variations caused by different distances between switching elements and variable resistance elements, transforming the asymmetric layout into a functional advantage for area reduction.
2Speed
If variable resistance elements are placed closer to switching elements to improve speed, then speed is improved, but resistance variation increases causing element failure
Solution Approach 1:
The patent applies parameter changes by modifying the resistance parameter through addition of compensation resistance components. By adjusting the resistance value in specific paths, the patent compensates for resistance variations caused by shortened distances, thereby maintaining reliable element operation while preserving the speed benefits of compact layout.
Solution Approach 2:
The patent implements preliminary anti-action by pre-introducing compensation resistance components into the circuit paths before operation. This preliminary adjustment counteracts the harmful effect of resistance variation that would otherwise lead to element failure, preventing the problem before it occurs during actual memory operations.
3Reliability
If resistance paths are made equal in length to balance resistance, then resistance balance is improved, but device area increases
Solution Approach 1:
The patent applies local quality by introducing compensation resistance components specifically in paths where variable resistance elements are closer to switching elements. This creates non-uniform resistance compensation across different memory cell paths, balancing the overall resistance without requiring uniform structural modifications throughout the entire memory array, thus maintaining compact area while improving operating characteristics.
4Reliability
If compensation resistance components are added to balance resistance paths, then resistance balance is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by introducing compensation resistance components specifically in paths where variable resistance elements are closer to switching elements. This creates non-uniform resistance compensation across different memory cell paths, balancing the overall resistance without requiring uniform structural modifications throughout the entire memory array, thus maintaining compact area while improving operating characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the operating characteristics of the semiconductor memory by maintaining balanced resistance paths, reducing the risk of element failure and improving write and read operations, thereby stabilizing the memory device's performance.
Implementation Method 1
semiconductor devices which can store data using a characteristic that they are switched between different resistant states according to an applied voltage or current, for example, an RRAM (resistive random access memory)
Implementation Method 2
a second path from a first terminal of the second switching element to the second variable resistance element includes a resistance component, a resistance of the second path being greater than a resistance of a first path
Data Source
AI summary
An electronic device includes a semiconductor memory. The semiconductor memory includes a first variable resistance element, a first switching element coupled to the first variable resistance element via a first line, a second variable resistance element, and a second switching element coupled to the second variable resistance element via a second line, wherein a distance between the first switching element and the first variable resistance element is larger than a distance between the second switching element and the second variable resistance element, and wherein a second path from a first terminal of the second switching element to the second variable resistance element includes a resistance component, a resistance of the second path being greater than a resistance of a first path, the first path being from a first terminal of the first switching element to the first variable resistance element.