Variable Resistance Memory Cell Differential Read Circuit
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Solution Overview
Problem
Current semiconductor memory devices with 1T1R structure, such as those using MTJ elements, have insufficient read margins due to small resistance differences between high and low resistance states, leading to frequent read operation errors, and attempts to extend read time to reduce errors degrade read operation speed.
Innovation Solution
The implementation of memory circuits with two variable resistance elements and two access elements per memory cell, where the direction and magnitude of read currents differ to sense resistance states, and the direction of write currents is reversed for different data operations, improving read operation characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read time is extended to reduce errors, then read operation accuracy is improved, but read operation speed deteriorates
Solution Approach 1:
The memory cell is segmented into two variable resistance elements (first and second) with separate access paths. During read operation, read currents flow through each element in opposite directions, allowing differential sensing that amplifies the resistance difference signal. This segmentation enables accurate readout without extending read time, thus maintaining speed while improving accuracy.
Solution Approach 2:
The invention changes the sensing parameter from absolute resistance measurement to differential resistance measurement. By measuring the difference in voltage drops across two variable resistance elements subjected to equal and opposite currents, the system amplifies the signal corresponding to resistance state differences, improving read accuracy without requiring longer measurement times.
2Device complexity
If resistance difference between high and low resistance states is small, then device complexity is reduced, but read operation accuracy deteriorates
Solution Approach 1:
The invention transforms the measurement parameter from absolute resistance to differential resistance. By measuring the voltage difference between two branches with opposite current directions, small resistance changes are amplified into larger voltage differences, improving read accuracy without increasing device complexity.
Solution Approach 2:
The access elements (transistors) serve as intermediaries that enable controlled current flow through each variable resistance element in opposite directions. This intermediary mechanism allows differential sensing without requiring direct comparison circuits, maintaining device simplicity while improving read accuracy.
3Reliability
If differential current flow is used to sense resistance states, then read operation accuracy is improved, but device complexity increases
Solution Approach 1:
The invention merges the read and write functions into the same current paths. The bit lines and access elements are used for both differential sensing during read operations and for applying switching currents during write operations. This merging avoids requiring separate sensing circuits, thus improving read accuracy without proportionally increasing device complexity.
Solution Approach 2:
The variable resistance elements serve multiple functions: they are the storage medium during write operations and the sensing element during read operations. The same physical structure is used for both data writing and data reading, eliminating the need for separate sensing components and reducing overall device complexity while enabling differential readout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read operation accuracy while maintaining speed by utilizing the differential current flow through variable resistance elements to distinguish between resistance states, thereby improving the overall performance of semiconductor memory devices.
Implementation Method 1
The variable resistance element in each of the first and second stacked structures switches between different resistance states according to a direction of a switching current flowing through the variable resistance element
Data Source
AI summary
An electronic device may be provided to include: first and second active regions arranged adjacent to each other in a second direction; a gate structure extended in the second direction; a first source region and a first drain region formed in the first active region; a second source region and a second drain region formed in the second active region; a source line contact formed over the first and second source regions and connected to the first and second source regions; a source line connected to the source line contact over the source line contact and extended in a first direction; first and second stacked structures formed over the first and second drain regions; and first and second bit lines formed over the first and second stacked structures, wherein the first and second bit lines are extended in the first direction.