Variable Resistance Memory Current Control Circuit

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Solution Overview

Problem

The existing variable resistance nonvolatile memory devices with 1D1R cross point memory cells face challenges in reliably setting desired resistance values due to unpredictable resistance change modes (A mode or B mode) and the complexity of switching between drive circuits, leading to instability and decreased programming speed, as well as reliability issues with current steering elements.

Innovation Solution

A variable resistance nonvolatile memory device is designed with a current limit circuit to control current flow during low resistance state changes and a boost circuit to enhance programming speed, along with a specific configuration of drive circuits and signal lines to stabilize resistance changes and improve current steering element reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a variable resistance nonvolatile memory device uses 1D1R cross point memory cells with unpredictable resistance change modes (A mode or B mode), then the device can achieve nonvolatile memory storage, but the resistance value setting becomes unreliable and programming speed decreases

Engineering Contradiction:
Improveresistance value setting reliabilityVSAvoidprogramming speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by introducing a boost circuit that activates before the resistance change occurs. This boost circuit temporarily increases the current flow to ensure the variable resistance element transitions reliably to the desired low resistance state, preventing the unpredictable A mode/B mode behavior from causing programming failures or speed degradation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting the current flow parameters during programming operations. A current limit circuit restricts the maximum current to prevent excessive current damage, while a boost circuit temporarily increases current to ensure reliable resistance transitions. These dynamic parameter adjustments resolve the contradiction between reliable resistance setting and maintained programming speed.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the device switches between different drive circuits to handle A mode and B mode resistance changes, then it can adapt to different resistance change behaviors, but the device complexity increases and programming speed decreases

Engineering Contradiction:
Improveadaptation to resistance change modesVSAvoiddrive circuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a single drive circuit that incorporates both current limiting and boosting capabilities. This unified circuit can handle both A mode and B mode resistance changes without requiring separate drive circuits for each mode, thereby maintaining adaptability while reducing overall device complexity and avoiding programming speed degradation from circuit switching.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements self-service through feedback mechanisms that automatically detect the resistance change mode (A mode or B mode) and adjust the current flow parameters accordingly. The drive circuit monitors the variable resistance element's state and self-regulates the current without external intervention, eliminating the need for complex external control circuits while maintaining adaptability to different resistance change behaviors.

Inventive Principle:
Principle #25Self-service

3Productivity

If the device allows high current flow to ensure fast programming, then programming speed improves, but the current steering element reliability deteriorates

Engineering Contradiction:
Improveprogramming speedVSAvoidcurrent steering element reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies partial or excessive action by using a boost circuit that temporarily provides excessive current flow only during the critical initial phase of resistance transition. Once the variable resistance element begins transitioning to the low resistance state, the current is automatically limited to safe levels. This approach ensures fast programming during the critical transition period while preventing excessive current damage to the current steering element throughout the entire programming process.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for stable resistance value setting with minimal variation, enhances the reliability of current steering elements, and reduces programming speed decreases by controlling current flow and using boost circuits to optimize memory cell operations.

Implementation Method 1

a variable resistance element configured so as to increase in resistance by application of a positive voltage to the second electrode with respect to the first electrode and to decrease in resistance by application of a positive voltage to the first electrode with respect to the second electrode

Methodology Applied
Scientific EffectVariable resistance effect: Electrical Resistance

Data Source

PatentUS8675387B2Variable resistance nonvolatile memory device and programming method for same
Publication Date: 2014.03.18 PANASONIC SEMICON SOLUTIONS CO LTD
  • US8675387B2 patent drawing
  • US8675387B2 patent drawing
  • US8675387B2 patent drawing

AI summary

A variable resistance nonvolatile memory device includes a plurality of memory cells in each of which a variable resistance element and a current steering element having two terminals are connected in series. Additionally, a current limit circuit limits a first current flowing in a direction for changing the memory cells to a low resistance state, and a boost circuit increases, when one of the memory cells changes to the low resistance state, the first current in a first period before the memory cell changes to the low resistance state.