Variable Resistance Memory Dummy Patterns for Etch Residue Control
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Solution Overview
Problem
Conventional variable resistance memory devices face challenges in achieving improved characteristics, such as reduced leakage currents and enhanced electrical performance, due to etch residues on sidewalls of pattern structures.
Innovation Solution
The proposed solution involves a variable resistance memory device design with a substrate having a cell region and a dummy region, featuring conductive layer patterns and cell structures that differ in shape and width on the dummy region compared to the cell region, along with a dishing prevention blocking pattern to minimize etch residues and prevent dishing phenomena during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional variable resistance memory devices are manufactured using standard etching processes, then manufacturing simplicity is maintained, but etch residues remain on sidewalls causing increased leakage currents and degraded electrical performance
Solution Approach 1:
The dummy pattern structure is divided into multiple segments: a first dummy conductive layer pattern, a second dummy conductive layer pattern, and a third dummy conductive layer pattern stacked at different heights. This segmentation allows each layer to serve specific functions in preventing etch residues and dishing phenomena, thereby improving electrical performance without compromising manufacturing simplicity
Solution Approach 2:
The dummy pattern structure is formed in advance during the manufacturing process, before the actual memory cell structures are completed. The dummy structures pre-establish protective features that prevent etch residues and dishing from occurring during subsequent etching operations, thus improving reliability without adding complex post-processing steps
2Object-generated harmful factors
If the dummy pattern structure is formed with multiple conductive layers at different heights, then etch residues and dishing phenomena are prevented, but device structure complexity increases
Solution Approach 1:
The dummy pattern structure serves multiple functions simultaneously: it prevents dishing phenomena during etching, prevents etch residue formation, and maintains manufacturing process compatibility. By making the dummy structure multi-functional, the patent reduces the need for additional separate components, thereby managing complexity while achieving multiple protective goals
Solution Approach 2:
The dummy pattern structure is strategically positioned only in specific regions where dishing and etch residue problems occur, rather than uniformly across the entire device. The first, second, and third dummy conductive layer patterns are located at different heights and positions to address local issues, optimizing protection while minimizing overall structural complexity
Data Source
AI summary
A variable resistance memory device includes a plurality of first conductive layer pattern, a plurality of second conductive layer patterns over the first conductive layer patterns, and a plurality of lower cell structures including a switching element and a variable resistance element, the lower cell structures being formed at intersections at which the first conductive layer patterns and the second conductive layer patterns overlap each other. The first conductive layer patterns, the second conductive layer patterns and the lower cell structures serves as one of a memory cell, a first dummy pattern structure and a second dummy pattern structure. The first dummy pattern structure is formed on both edge portions in the first direction, and the second conductive layer pattern of the first dummy pattern structure protrudes in the first direction from a sidewall of the lower cell structure thereunder, and the second dummy pattern structure is formed on both edge portions in the second direction, and the first conductive layer pattern of the second dummy pattern structure protrudes in the second direction from a sidewall of the lower cell structure thereon. Failures of the variable resistance memory device due to the etch residue may decrease.