Variable Resistance Memory with Dynamic Write Conditions
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Solution Overview
Problem
Variable resistance memory devices face challenges in meeting multiple reliability conditions and performance requirements, leading to increased costs or unmet specifications due to the need for tailored specifications for different data properties.
Innovation Solution
A semiconductor memory device with a memory array featuring a reversible and non-volatile variable resistance element, a writing element that selects write conditions based on input commands, and storage areas optimized for endurance, retention, and high-speed reading, allowing for flexible data management and refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If specifications are made to match a specific reliability condition, then the reliability requirement is met, but costs increase due to excess specifications
Solution Approach 1:
The patent applies dynamics by making the write conditions adjustable and selectable based on the type of data being stored. The memory controller can dynamically select between first write conditions (for high reliability data) and second write conditions (for normal data), allowing the system to adapt its operation to match actual requirements rather than always using the most conservative settings.
Solution Approach 2:
The patent changes physical parameters by applying different write pulse voltages and durations depending on the data type. For high reliability data, stronger write pulses are applied to ensure robust storage, while for normal data, standard write conditions are used. This parameter variation allows optimization of both reliability and cost efficiency.
2Reliability
If specifications are made to match a specific reliability condition, then the reliability requirement is met, but other performance requirements may not be achieved
Solution Approach 1:
The patent implements multi-functionality by enabling the same memory device to handle multiple types of data with different reliability and performance requirements. The system can store both high reliability data (requiring stringent conditions) and normal data (allowing faster access) within the same memory array, making the device versatile for various applications.
Solution Approach 2:
The memory controller dynamically adjusts write conditions based on the data type being stored. When high reliability data is detected, the controller applies first write conditions with stronger parameters; when normal data is detected, it applies second write conditions optimized for speed. This dynamic adaptation allows the system to meet diverse performance requirements simultaneously.
3Reliability
If strong write conditions are applied to ensure reliability, then data durability is improved, but write time increases
Solution Approach 1:
The patent changes write parameters (voltage amplitude and pulse duration) based on data type. For high reliability data requiring maximum durability, the system applies stronger write pulses with higher voltage and/or longer duration. For normal data, weaker and faster write pulses are used, reducing write time without compromising acceptable reliability levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device satisfies multiple reliability conditions and performance requirements by dynamically adjusting write conditions and operations, enhancing data durability, retention, and reading speed while reducing costs.
Implementation Method 1
A variable resistance memory stores data by applying a pulse voltage to a variable resistance element and reversibly and non-volatilely setting the variable resistance element to a high resistance state or a low resistance state
Data Source
AI summary
A semiconductor memory device capable of satisfying multiple reliability conditions and multiple performance requirements is provided. A variable resistance memory of the disclosure makes it possible to write data in a memory array by changing a write condition according to the type of a write command from the outside. If the write command is an endurance-related command, an endurance algorithm is selected and data is written in an endurance storage area. If the write command is a retention-related command, a retention algorithm is selected and data is written in a retention storage area.