Variable Resistance Memory Fabrication via Selective Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current methods for fabricating semiconductor memory devices with variable resistance materials are complex and do not effectively improve the characteristics of these elements, leading to challenges in miniaturization, low power consumption, and high performance in electronic devices.
Innovation Solution
A method involving the formation of a semiconductor memory device with a variable resistance material layer, including a bottom electrode, a variable resistance material layer with horizontal and vertical parts, and a top electrode, where the vertical part is selectively removed using dry etching or wet cleaning processes, and a spacer layer is formed to improve the structure and reliability of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fabrication methods are used for variable resistance material layers, then the process can be completed, but the manufacturing complexity is high and the characteristics of the variable resistance element are not effectively improved
Solution Approach 1:
The variable resistance material layer is divided into two distinct parts: a horizontal part that remains functional and a vertical part that is selectively removed. This segmentation allows the patent to improve variable resistance element characteristics by removing excess material while preserving the functional portion, thereby resolving the contradiction between reliability improvement and process complexity.
Solution Approach 2:
The patent extracts and removes the vertical part of the variable resistance material layer through selective etching processes. By taking out the unnecessary vertical portion while retaining the horizontal functional part, the patent effectively improves the characteristics of the variable resistance element without requiring complete re-fabrication, thus managing process complexity.
2Shape
If the variable resistance material layer is formed with both horizontal and vertical parts, then the structure is created, but additional etching steps are required to remove the vertical part
Solution Approach 1:
The variable resistance material layer is initially formed with both horizontal and vertical parts in a single deposition step. This preliminary action creates the complete structure that can then be selectively modified. The subsequent selective removal of the vertical part through etching processes refines the structure without requiring complete re-fabrication, balancing shape creation with production efficiency.
Solution Approach 2:
The etching processes are applied locally and selectively to remove only the vertical part of the variable resistance material layer while preserving the horizontal part. This local quality approach ensures that the functional horizontal portion remains intact while the excess vertical material is removed, maintaining fabrication efficiency while achieving the desired structural refinement.
3Manufacturing precision
If dry etching or wet cleaning processes are used to remove the vertical part, then the structure is refined, but the process steps increase
Solution Approach 1:
The patent employs dry etching processes (such as IBE - Ion Beam Etching) or wet cleaning processes to selectively remove the vertical part of the variable resistance material layer. These processes provide precise control over material removal at the nanoscale level, achieving high manufacturing precision. By using established etching and cleaning technologies rather than developing new fabrication methods, the patent achieves precision while managing process complexity through the use of proven techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the fabrication process, enhances the characteristics of the variable resistance element, and improves the reliability and yield of semiconductor memory devices, enabling better performance and functionality in electronic devices.
Implementation Method 1
The dry etching process comprises an IBE (Ion Beam Etching) process
Implementation Method 2
The deactivating of the part of the variable resistance material layer includes performing an oxidation process
Data Source
AI summary
A method for fabricating an electronic device including a semiconductor memory may include: forming a first interlayer dielectric layer over a substrate to have an opening exposing the substrate; forming a bottom electrode in a portion of the opening to have an exposed top surface; forming a variable resistance material layer along sidewalls of the remaining portion of the opening and the exposed top surface of the bottom electrode; forming a top electrode over the variable resistance material layer so as to fill the opening; etching the first interlayer dielectric layer to a predetermined depth to expose a part of the variable resistance material layer surrounding sidewalls of the top electrode; and removing the part of the variable resistance material layer to form a unit cell.