Variable Resistance Memory Programming Recovery Pulse Method
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Solution Overview
Problem
Conventional variable resistance nonvolatile memory devices experience unstable resistance changes over multiple programming operations, leading to a reduction in operating life and reliability.
Innovation Solution
A method of programming a variable resistance nonvolatile memory element using an oxygen-deficient transition metal oxide layer structure, where a first transition metal oxide layer with a higher oxygen deficiency is in contact with one electrode and a second layer with a lower oxygen deficiency is in contact with the other electrode, employing specific voltage pulses to ensure stable resistance state changes, including recovery and re-breakdown pulses to maintain operation window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional variable resistance nonvolatile memory devices are programmed using standard voltage pulses, then initial programming operations can achieve resistance state changes, but the resistance changes become unstable over multiple programming operations, reducing operating life and reliability
Solution Approach 1:
The patent applies preliminary forming processing to create a stable conductive path structure before normal programming operations. This initial structuring action prepares the memory element to withstand subsequent programming cycles, preventing the instability that occurs in conventional devices during repeated operations.
Solution Approach 2:
The patent modifies programming parameters by applying specific voltage pulse sequences with controlled amplitudes and durations. The forming voltage is set at a specific level (e.g., 5V) followed by programming voltages at different levels (e.g., 3V for HR, -3V for LR). These parameter changes ensure stable resistance transitions while maintaining device reliability over extended operating life.
2Use of energy by moving object
If the film thickness of transition metal oxide is decreased to reduce forming voltage, then forming voltage is reduced, but the stability and reliability of resistance state changes deteriorate over multiple programming operations
Solution Approach 1:
The patent optimizes the film thickness parameter to a specific range (5nm to 20nm) that balances forming voltage requirements with operational stability. This parameter optimization ensures that the memory element can be programmed at practical voltage levels while maintaining reliable resistance state changes over extended operating life, resolving the trade-off between low forming voltage and stability.
3Productivity
If standard programming voltage pulses are applied repeatedly, then programming operations can be performed, but the operation window narrows and resistance state changes become less reliable
Solution Approach 1:
The patent implements periodic recovery operations between programming cycles. Specific voltage pulses are applied at defined intervals to restore the conductive path structure and prevent degradation. This periodic maintenance action allows for a higher number of programming operations while maintaining a stable operation window and reliable resistance state changes throughout the device's operating life.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures a stable operation window and significantly enhances the reliability of the nonvolatile memory device by maintaining resistance state changes over an increased number of programming operations.
Implementation Method 1
the resistance value reversibly changes based on electrical signals
Implementation Method 2
variable resistance nonvolatile memory element for use in stably sustaining a resistance change of the variable resistance nonvolatile memory element whose resistance value reversibly changes based on electrical signals
Data Source
AI summary
A method of programming a variable resistance nonvolatile memory element that removes a defect in a resistance change, ensures an operation widow, and stably sustains a resistance change operation, the method including: applying, when the detect in the resistance change occurs in the variable resistance nonvolatile memory element, a recovery voltage pulse at least once to the variable resistance nonvolatile memory element, the recovery voltage pulse including: a first recovery voltage pulse that has an amplitude greater than amplitudes of a normal high resistance writing voltage pulse and a low resistance writing voltage pulse; and a second recovery voltage pulse that is the low resistance writing voltage pulse following the first recovery voltage pulse.