Variable Resistance Memory Device Spacer Structure
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high performance and low power consumption while maintaining nonvolatile properties, especially in volatile memory devices that lose data when power is interrupted.
Innovation Solution
A variable resistance memory device is designed with a structure comprising conductive lines, memory cells, switching patterns, intermediate electrodes, variable resistance patterns, and spacers, where each memory cell is connected in series, and an insulating layer fills the space between cells, enabling efficient read, write, and erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional volatile memory structure is used, then the device complexity is reduced, but the data reliability deteriorates because data is lost when power is interrupted
Solution Approach 1:
The memory cell is segmented into distinct functional layers including a lower electrode, switching pattern, intermediate electrode, variable resistance pattern, and upper electrode. This segmentation allows each layer to perform its specific function independently, achieving nonvolatile data storage while maintaining manageable structural complexity through modular design
Solution Approach 2:
The patent transitions from planar memory structures to a vertical stacked configuration where memory cells are arranged in multiple layers along the vertical dimension. This dimensional change increases storage density and enables nonvolatile functionality without proportionally increasing lateral device complexity
2Productivity
If next-generation memory structures are implemented, then performance and power consumption are improved, but the manufacturing precision requirements increase
Solution Approach 1:
The intermediate electrode serves as a mediator layer between the switching pattern and the variable resistance pattern. This intermediary structure facilitates precise alignment and electrical connection between layers, enabling high-performance operation while reducing the direct manufacturing precision requirements between adjacent patterns
Solution Approach 2:
The spacers are formed preliminarily to define the lateral boundaries and alignment references for subsequent pattern formation steps. This preliminary structuring establishes precise geometric constraints that guide the formation of switching patterns and variable resistance patterns, improving manufacturing precision
3Manufacturing precision
If spacers are added to the memory cell structure, then the manufacturing precision is improved through better pattern definition, but the device complexity increases
Solution Approach 1:
The spacers serve multiple functions simultaneously: they define lateral boundaries for pattern formation, provide alignment references for subsequent deposition steps, and act as physical barriers to prevent material diffusion. This multi-functionality improves manufacturing precision without adding proportional structural complexity
Data Source
AI summary
A variable resistance memory device and a method of fabricating a variable resistance memory device, the device including first conductive lines extending in a first direction; second conductive lines extending in a second direction crossing the first direction; and memory cells at respective intersection points of the first conductive lines and the second conductive lines, wherein each of the memory cells includes a switching pattern, an intermediate electrode, a variable resistance pattern, and an upper electrode, which are between the first and second conductive lines and are connected in series; and a spacer structure including a first spacer and a second spacer, the first spacer being on a side surface of the upper electrode, and the second spacer covering the first spacer and a side surface of the variable resistance pattern such that the second spacer is in contact with the side surface of the variable resistance pattern.